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Tradeoff cache between latency and capacity in chip multiprocessors

Jisuanji Yanjiu yu Fazhan/computer Research and Development 2009年第1期46卷 167-175页

作者： Xiao, Junhua Feng, Zijun Zhang, Longbing Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Graduate School Chinese Academy of Sciences Beijing 100049 China

Chip multiprocessors (CMP) have become the main stream microprocessor architecture. In CMP, the cache, especially the last level cache, is the critical part of its performance and becomes a focus of current research activities. CMP cache faces the conflicting requirements of satisfying both latency and capacity, and has to trade off between techniques that reduce off-chip and cross-chip misses. The private cache design minimizes the cache access latency but reduces the total effective cache capacity. The shared cache design maximizes the effective cache capacity but incurs long hit latency. In this paper, a CMP cache design (tradeoff cache between latency and capacity, TCLC) is proposed. TCLC is a private and shared hybrid design. TCLC can dynamically identify the cache blocks' shared type and optimize them respectively. The private type is optimized through migration policy, the shared read-only type is optimized through replication policy, and the shared read-write type is optimized through center placement policy. TCLC tries to make cache access latency close to private design, and effective cache capacity close to shared design, which can mitigate the impact of the wire delay and reduce the average memory access latency. The experiment results indicate that this proposal performs 13.7% better than a private cache and 12% better than a shared cache.

关键词： Economic and social effects

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Address register promotion method based on feedbacks

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Jisuanji Yanjiu yu Fazhan/computer Research and Development 2009年第4期46卷 698-704页

作者： Zhang, Chao Lü, Fang Wang, Lei Feng, Xiaobing Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Graduate University Chinese Academy of Sciences Beijing 100049 China

In processor architectures such as MIPS, ALPHA, SPARC and PowerPC, indirect addressing mode is always adopted to access global variables and static ones. Since the addresses of these variables and the corresponding values are in different data sections in the corresponding binary file, the data locality of the program will be very poor. As a result, accessing the read only addresses of these variables every time tends to result in non-trivial redundant data cache miss memory accesses. Moreover, such indirect addressing mode will generate two sequential load instructions which have data dependences between them. As a result, the amount of instruction level parallelism (ILP) of the program will be decreased. The authors present an address register promotion method based on feedbacks (ARPF) to solve the above problems. ARPF algorithm reduces the redundant accesses to the read only addresses of the global variables and static ones, increases the amount of instruction level parallelism of a program, and avoids the performance declines due to the increase in register pressure caused by register promotion. The algorithm has been implemented in the Loongson compiler for MIPS architecture. Experiments on SPEC CPU2000INT benchmarks are conducted to show that ARPF can improve the performance of all benchmarks by 1%-6%.

关键词： Benchmarking

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Differential Fault Analysis on SHACAL-1

Differential Fault Analysis on SHACAL-1

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Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC)

作者： Ruilin Li Chao Li Chunye Gong Department of Mathematics and System Science Science College National University of Defense Technology Changsha China State Key Laboratory of Information Security Institute of Software Chinese Academy and Sciences Beijing China School of Computer National University of Defense Technology Changsha China

ISBN: (纸本)9781424449729;9780769538242

SHACAL-1, known as one of the finalists of the NESSIE project, originates from the compression component of the widely used hash function SHA-1. The requirements of confusion and diffusion are implemented through mixing operations and rotations other than substitution and permutation, thus there exists little literature on its immunity against fault attacks. In this paper, we apply differential fault analysis on SHACAL-1 in a synthetic approach. We introduce the random word fault model, present some theoretical arguments, and give an efficient fault attack based on the characteristic of the cipher. Both theoretical predications and experimental results demonstrate that, 72 random faults are needed to obtain 512 bits key with successful probability more than 60%, while 120 random faults are enough to obtain 512 bits key with successful probability more than 99%.

关键词： Doped fiber amplifiers Public key cryptography Fault diagnosis Information analysis Chaos Mathematics Educational institutions Laboratories Information security Public key

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Design of a flip-flop circuit within digital logic analyzer based on FPGA

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Harbin Gongye Daxue Xuebao/Journal of Harbin Institute of Technology 2009年第SUPPL. 1期41卷 58-62页

作者： Xiao, Ling-Li Xu, Ning Han, Yin-He School of Computer Science and Technology Wuhan University Of Technology Wuhan 430070 China System Architecture Key Laboratory Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China

With the wide application of EDA technique, the period for the development of electronic products has been shortened. That implements the software of the hardware design and reduces the costs. Based on the analysis of the principle of digital logic analyzer circuit, this paper discusses the working principles of its flip-flop circuit module and the implementation method of FPGA, and presents the program design and emulation result of part circuits.

关键词： Field programmable gate arrays (FPGA)

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Steady state speed distribution analysis for a combined cellular automaton traffic model

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Chinese Physics B 2008年第8期17卷 2850-2858页

作者：王俊峰陈桂生刘进 College of Computer Science Sichuan University Institute of Electronic System Engineering State Key Laboratory of Software Engineering Wuhan University

Cellular Automaton （CA） based traffic flow models have been extensively studied due to their effectiveness and simplicity in recent years. This paper develops a discrete time Markov chain （DTMC） analytical framework for a Nagel-Schreckenberg and Fukui Ishibashi combined CA model （W^2H traffic flow model） from microscopic point of view to capture the macroscopic steady state speed distributions. The inter-vehicle spacing Maxkov chain and the steady state speed Markov chain are proved to be irreducible and ergodic. The theoretical speed probability distributions depending on the traffic density and stochastic delay probability are in good accordance with numerical simulations. The derived fundamental diagram of the average speed from theoretical speed distributions is equivalent to the results in the previous work.

关键词： cellular automaton traffic flow model speed distribution discrete time Markov chain

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Space charge characteristics of multi-layer oil-paper insulation under different DC voltages

Space charge characteristics of multi-layer oil-paper insula...

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第九届电介质材料性能与应用国际会议(The 9th International Conference on Properties and Applications of Dielectric Materials)

作者： Chao TANG G CHEN M FU Ruijin LIAO The State Key Laboratory of Power Transmission Equipment & System Security and New Technology Chongq School of Electronics and Computer Science University of Southampton UK AVERA T&D Technology Centre Stafford UK The State Key Laboratory of Power Transmission Equipment & System Security and New Technology Chongq

ISBN: (纸本)9781424443666

In this paper, space charge in oil-paper insulation system has been investigated using the pulsed electroacoustic (PEA) technique. A series of measurements were carried out when the insulation system was subjected to different applied voltages. Charge dynamics in the insulation system during the volts-on, volts-off and decay have been analyzed. It has been found that homocharge injection occurred both at the anode and the cathode. Positive charges are observed to accumulate in the layers, which indicate that the oil-paper layer interfaces act as a barrier for positive charges. The decay tests showed that after 30min, about a quarter of space charges remained in the sample, about 90％ charges disappeared after 2 hours. Finally, total charge variation in these tests were analyzed.

关键词： Space Charge Oil-paper DC Voltage Multi-layer

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Register pressure sensitive instruction speculative scheduling technology

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Jisuanji Yanjiu yu Fazhan/computer Research and Development 2009年第3期46卷 485-491页

作者： Huang, Lei Feng, Xiaobing Lü, Fang Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Graduate University Chinese Academy of Sciences Beijing 100049 China

Speculation is an important method to overcome control flow constraints during instruction scheduling. On the one hand, speculation can exploit more instruction-level parallelism and improve performance. However, on the other hand, it may also lengthen the live range of variables and increase the register pressure, which in turn results in spilling some variables to memory and deteriorating the performance. Previous work on register pressure sensitive instruction scheduling generally scheduled instructions conservatively when there were too many live variables in the scheduling region. But actually different variables have different spilling costs and different impacts on performance. Here a register pressure sensitive speculative instruction scheduling technology is presented, which not only considers the count of live variables, but also analyzes the benefits and the spilling costs brought by instructions' speculative motions. The decrement of cycles in critical path is calculated as benefit, while the spilled variables are predicted and their spilling cost is used as cost. Only the speculative motion with benefit greater than the cost is permitted in our method. This algorithm has been implemented in Godson Compiler for MIPS architecture. Experiment result shows that the method in this paper can obtain 1.44% speedup on average relative to its register pressure insensitive counterpart on SPEC CPU2000INT benchmarks.

关键词： Costs

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A study and implementation of the Huffman algorithm based on condensed Huffman table

A study and implementation of the Huffman algorithm based on...

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International Conference on computer Science and Software Engineering, CSSE 2008

作者： Bao, Ergude Li, Weisheng Fan, Dongrui Ma, Xiaoyu School of Software Beijing Jiaotong University Key Laboratory of Computer System and Architecture Institute of Computer Technology Chinese Academy of Sciences

ISBN: (纸本)9780769533360

Huffman codes are being widely used as a very efficient technique for compressing data. To achieve high compressing ratio, some properties of encoding and decoding for canonical Huffman table are discussed. A study and implementation of the Huffman algorithm based on condensed Huffman table is studied. New condensed Huffman table could reduce the cost of the Huffman coding table. Compared with traditional Huffman coding table and other improved tables, the best advantages of new condensed Huffman table is that the space requirement is reduced significantly. © 2008 IEEE.

关键词： Codes (symbols)

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Apical-dominant particle swarm optimization

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Progress in Natural Science:Materials International 2008年第12期18卷 1577-1582页

作者： Zhihua Cui~(a,b) Xingjuan Cai~b Jianchao Zeng~b Guoji Sun~a a state key laboratory for Manufacturing systems Engineering,Xi’an Jiaotong University,Xi’an 710049,China b Division of system Simulation and computer Application,Taiyuan University of Science and Technology,Taiyuan 030024,China [a]State Key Laboratory for Manufacturing Systems Engineering Xi’an Jiaotong University Xi’an 710049 China [b]Division of System Simulation and Computer Application Taiyuan University of Science and Technology Taiyuan 030024 China

Particle swarm optimization (PSO) is a new stochastic population-based search methodology by simulating the animal social behaviors such as birds flocking and fish *** improvements have been proposed within the framework of this biological assumption. However,in this paper,the search pattern of PSO is used to model the branch growth process of natural *** provides a different poten- tial manner from artificial *** illustrate the effectiveness of this new model,apical dominance phenomenon is introduced to construct a ncvel variant by emphasizing the influence of the *** this improvement,the population is divided into three different kinds of buds associated with their ***,a mutation strategy is applied to enhance the ability escaping from a local ***- ulation results demonstrate good performance of the new method when solving high-dimensional multi-modal problems.

关键词： Apical-dominance phenomenon Particle swarm optimization Branch growth model High-dimensional multi-modal benchmarks

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High repetition rate passively mode-locked erbium-doped fiber laser

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Chinese Science Bulletin 2008年第5期53卷 706-708页

作者： LI Jing DAI YongHeng ZHANG ZhiGang Institute of Quantum Electronics State Key Laboratory of Advanced Optical Communication System and Networks School of Electronics Engineering and Computer Science Peking University Beijing 100871 China

We report a passively mode-locked high repetition rate erbium-doped femtosecond fiber laser via nonlinear polarization rotation, with a fundamental repetition rate of 101.94 MHz. The output power is 34 mW when pumped by a single mode fiber coupled laser diode at 370 mW. The spectral width is 25 nm, corresponding to a transform limited pulse width of 105 fs.

关键词：铒掺杂光纤激光器循环率光学频率被动锁模光纤

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