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Nonlinear Disturbance Observer of Clutch Slipping Torque for Multi-Mode Hybrid Electric Vehicles

Journal of Shanghai Jiaotong University (Science) 2024年 1-8页

作者： Peng, Cheng Chen, Li Fu, Shenglai Key Laboratory of Marine Intelligent Equipment and System of Ministry of Education School of Naval Architecture Ocean & ampCivil Engineering Shanghai Jiao Tong University Shanghai200240 China State Key Laboratory of Ocean Engineering Shanghai Jiao Tong University Shanghai200240 China

Clutch slipping torque varies complicatedly and has a strong nonlinearity during the mode transition of hybrid electric vehicles. In order to estimate the clutch slipping torque, an online estimator based on the nonlinear disturbance observer (NDO) is proposed. First, an estimation-oriented model of the clutch slipping torque is established based on the LuGre friction model. Next, the NDO is designed to estimate the unknown part of clutch slipping torque based on the dynamics of the output shaft, while the output shaft torque required by NDO is estimated by a Luenberger state observer. To verify the effectiveness of the proposed estimator, experiments are conducted under different initial slipping speeds and inlet oil temperatures. The results show that the proposed estimator gains high accuracy. © Shanghai Jiao Tong University 2024.

关键词： Clutches

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Attack-detection and multi-clock source cooperation-based accurate time synchronization for PLC-AIoT in smart parks

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Digital Communications and Networks 2024年第6期10卷 1732-1740页

作者： Zhigang Du Sunxuan Zhang Zijia Yao Zhenyu Zhou Muhammad Tariq State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources North China Electric Power UniversityBeijing 102206China Electrical Engineering Department National University of Computer and Emerging SciencesIslamabad 44000Pakistan

Power Line Communications-Artificial Intelligence of Things(PLC-AIo T)combines the low cost and high coverage of PLC with the learning ability of Artificial Intelligence(AI)to provide data collection and transmission capabilities for PLC-AIo T devices in smart *** the development of smart parks,their emerging services require secure and accurate time synchronization of PLC-AIo T ***,the impact of attackers on the accuracy of time synchronization cannot be *** solve the aforementioned problems,we propose a tampering attack-aware Deep Q-Network(DQN)-based time synchronization ***,we construct an abnormal clock source detection ***,the abnormal clock source is detected and excluded by comparing the time synchronization information between the device and the ***,the proposed algorithm realizes the joint guarantee of high accuracy and low delay for PLC-AIo T in smart parks by intelligently selecting the multi-clock source cooperation strategy and timing *** results show that the proposed algorithm has better time synchronization delay and accuracy performance.

关键词： Smart park Power line communications Artificial intelligence of things Tampering attack awareness Abnormal clock source detection Multi-clock source cooperation

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P-GAS: Parallelizing a cycle-accurate event-driven many-core processor simulator using parallel discrete event simulation 10

P-GAS: Parallelizing a cycle-accurate event-driven many-core...

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24th Annual Workshop on Principles of Advanced and Distributed Simulation, PADS 2010

作者： Lv, Huiwei Cheng, Yuan Bai, Lu Chen, Mingyu Fan, Dongrui Sun, Ninghui Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences China Graduate School Chinese Academy of Sciences China

ISBN: (纸本)9781424472918

Multi-core processors are commonly available now, but most traditional computer architectural simulators still use single-thread execution. In this paper we use parallel discrete event simulation (PDES) to speedup a cycle-accurate event-driven many-core processor simulator. Evaluation against the sequential version shows that the parallelized one achieves an average speedup of 10.9× (up to 13.6×) running SPLASH-2 kernel on a 16-core host machine, with cycle counter differences of less than 0.1%. Moreover, super-linear speedups are achieved between running 1 thread and 8 threads due to reduced overhead of insert-event-to-queue time and increased cache size in parallel processing. We conclude that PDES could be an attractive option for achieving fast cycle-accurate many-core processor simulations. © 2010 IEEE.

关键词： Simulators

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Efficient optimization methodology in early-stage design of mesh-structured on-chip Power/Ground (P/G) networks

Efficient optimization methodology in early-stage design of ...

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ICSICT-2006: 2006 8th International Conference on Solid-state and Integrated Circuit Technology

作者： Luo, Zu-Ying Department of Electronics Beijing Normal University Beijing 100875 China Key Laboratory of Computer System and Architecture ICT CAS Beijing 100080 China

ISBN: (纸本)1424401615

Due to decreasing supply voltages and increasing power consumption of today's VLSI chips, IR drops on on-chip power/ground (P/G) grids have to be explicitly considered during floor-planning stage in the today's physical design flow. It is therefore very important to adjust the double-mesh P/G grids in the floor-planning for efficiently minimizing the worst-case IR drop subject to limited routing resource in early-stage P/G network design of high-end chips. In this paper, we present a novel feasible methodology to efficiently optimize the problem of mesh-structured center-bumped P/G grids under given routing resources. In [11], we have proposed the approximate current distribution (ACD) simulation method and the OS_SMACD optimization approach for early-stage single-level P/G meshes]. In this work, a feasible theory is induced to directly compute the optimal solutions OS_DMACD for practical double-mesh P/G grids of high-end chips. Experimental results show that OS_DMACD matches very well with the exact counterparts inefficiently obtained with ICCG, which can leads to significant speedup in the today IR-drop aware floor-planning. © 2006 IEEE.

关键词： VLSI circuits

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A novel post-silicon debug mechanism based on Suspect Window

A novel post-silicon debug mechanism based on Suspect Window

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作者： Gao, Jianliang Han, Yinhe Li, Xiaowei Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Graduate University of Chinese Academy of Sciences Beijing China

Bugs are becoming unavoidable in complex integrated circuit design. It is imperative to identify the bugs as soon as possible through post-silicon debug. For post-silicon debug, observability is one of the biggest challenges. Scan-based debug mechanism provides high observability by reusing scan chains. However, it is not feasible to scan dump cycle-by-cycle during program execution due to the excessive time required. In fact, it is not necessary to scan out the error-free states. In this paper, we introduce Suspect Window to cover the clock cycle in which the bug is triggered. Then, we present an efficient approach to determine the suspect window. Based on Suspect Window, we propose a novel debug mechanism to locate the bug both temporally and spatially. Since scan dumps are only taken in the suspect window with the proposed mechanism, the time required for locating the bug is greatly reduced. The approaches are evaluated using ISCAS'89 and ITC'99 benchmark circuits. The experimental results show that the proposed mechanism can significantly reduce the overall debug time compared to scan-based debug mechanism while keeping high observability. Copyright © 2010 The Institute of Electronics, Information and Communication Engineers.

关键词： Observability

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Motion behavior of non-metallic particles under high frequency magnetic field

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中国有色金属学会会刊：英文版 2009年第3期19卷 674-680页

作者：张忠涛郭庆涛于凤云李捷张剑李廷举 State Key Laboratory of Materials Modification by Laser Ion and Electron Beams School of Materials Science and Engineering Dalian University of Technology Center for Computer-Aided Solidification Processing Yonsei University Metallurgical System Engineering Seoul 120749 Korea

Non-metallic particles, especially alumina, are the main inclusions in aluminum and its alloys. Numerical simulation and the corresponding experiments were carried out to study the motion behavior of alumina particles in commercial pure aluminum under high frequency magnetic field. At the meantime, multi-pipe experiment was also done to discuss the prospect of continuous elimination of non-metallic particles under high frequency magnetic field. It is shown that: 1) results of numerical simulation are in good agreement with the experimental results, which certificates the rationality of the simulation model; 2) when the intensity of high frequency magnetic field is 0.06 T, the 30 μm alumina particles in melt inner could migrate to the edge and be removed within 2 s; 3) multi-pipe elimination of alumina particles under high frequency magnetic field is also effective and has a good prospect in industrial application.

关键词：高频磁场金属粒子运动行为氧化铝颗粒工业应用前景数值模拟金属颗粒仿真模型

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Beyond green: Evolution to adaptability and recyclability

Beyond green: Evolution to adaptability and recyclability

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2011 IEEE/ACM International Conference on Green Computing and Communications, GreenCom 2011

作者： Sun, Yuzhong Song, Ying Key Laboratory of Computer System and Architecture Chinese Academy of Sciences Beijing China Institute of Computing Technology Chinese Academy of Sciences Beijing China

ISBN: (纸本)9780769544663

In current social computing system, not only hardware but also software experiences a directly discarded mode. Such directly discarded mode may result in huge waste. The major challenge in green computing is the recyclability of the computing system. In order to address this challenge in the software field, this paper proposes a design idea of green software embodying the adaptability and recyclability. The adaptable and recyclable strategy may consist of two phases. The first one is compressing the increasingly deeper software stack;another one is keeping the functionality recycling and code reuse. The adaptability and recyclability mean automatically decomposing the complex software into several parts which are ease to be reused and automatically selecting the feasible parts for the on-writing software. And we also explore the system software design path to adaptability and recyclability in our previous work as well as in the future. © 2011 IEEE.

关键词： Software design

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Reliability Evaluation and Improvement of Islanded Microgrid Considering Operation Failures of Power Electronic Equipment

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Journal of Modern Power systems and Clean Energy 2020年第1期8卷 111-123页

作者： Wen Zhong Lingfeng Wang Zhaoxi Liu Shiying Hou State Key Laboratory of Power Transmission Equipment&System Security and New Technology College of Electrical EngineeringChongqing UniversityChongqingChina Laboratory of Trustworthy Cyber-Physical Systems and Infrastructures Department of Electrical Engineering and Computer ScienceUniversity of Wisconsin-MilwaukeeMilwaukeeUSA

With the high integration of power electronic technologies in microgrids,the reliability assessment considering power electronic devices has become a hot ***,so far no research has considered the impact of the operation failure probability of power electronic equipment on the overall reliability of the *** paper aims to construct a holistic operation failure rate model of power electronic systems based on the overall reliability assessment of islanded microgrid with high penetration of renewable energy sources(RESs).In addition,to improve the reliability of islanded microgrid,the conventional battery energy storage system(BESS)is replaced by the hybrid energy storage system(HESS).Based on the proposed model,the operation failure models for the power electronic modules in microgrid are built and tested,and then the sensitivity analysis is performed for exploring the influence of various factors on the reliability of the microgrid.

关键词： Reliability assessment reliability improvement operation failure rate power electronics islanded microgrid

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Software and hardware co-designed multi-level TLBs for chip multiprocessors

Software and hardware co-designed multi-level TLBs for chip ...

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11th IEEE International Conference on computer and Information Technology, CIT 2011 and 11th IEEE International Conference on Scalable Computing and Communications, SCALCOM 2011

作者： Zhang, Xiaohui Cong, Ming Chen, Guangqiang Key Laboratory of Computer System and Architecture Institute of Computing Technology Graduate University Beijing China National University of Defense Technology Changsha China

ISBN: (纸本)9780769543888

Translation Lookaside Buffers ( TLBs ) have a significant impact on system performance. Numerous prior studies focus on TLBs design for uniprocessors. With the advent of chip multiprocessors (CMPs), we need a shift to TLBs for chip multiprocessors. This paper presents a software-implemented level-two TLB-SL2-TLB which is a shared level-two TLB for multiprocessors. It not only reduces the cost of TLB refill handler for every processor core, but also reduces the redundant TLB misses' cost for CMPs effectively. Today, CMPs typically employ private per-core TLBs. SL2-TLB together with the hardware TLBs make up a software-hardware co-designed multilevel TLB system which brings great benefit to system performance while avoiding changing the hardware TLB. So it is a convenient and efficient method for CMPs' TLB performance improvement. The benefit brought by SL2-TLB to SPECCPU2000 is less than that to SPECCPU2006, about 5% and 7% separately. Thereinto, the average performance improvement of SPECint 2006 reaches about 12.7%. That is because the overhead for TLB refill is small when the cache is large enough to avoid a miss as walking the page table of applications with small memory footprints. The further optimization for SL2-TLB is kept the SL2-TLB table stay in L2 cache forever by the cache locking scheme. SL2-TLB together with cache locking scheme improves the performances by over 13% for SPECint 2006. And an average performance improvement of over 7% is brought to the new emerging parallel benchmark suite- Princeton Application Repository for Shared-Memory computers (PARSEC). And all the above evaluations are done on Godson-3 processors which is the latest generation of China's most powerful microprocessor family. © 2011 IEEE.

关键词： Benchmarking

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An accurate energy model for wsn node and its optimal design

An accurate energy model for wsn node and its optimal design

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ICCCAS 2007 - International Conference on Communications, Circuits and systems 2007

作者： Kan, Baoqiang Li, Cai Zhao, Lei College of Science Air Force Engineering University Xi'an China Key Laboratory of Computer System and Architecture Chinese Academy of Sciences Beijing China

ISBN: (纸本)9781424414741

Different from the traditional wireless networks, in wireless sensor networks(WSNs), power consumption is a critical aspect, because current nodes are always supported by constrainedenergy battery. A particular challenge in maintaining extended battery lifetime lies in achieving communications with low power. For better understanding of the design trade offs of WSNs, a more accurate power consumption model for wireless sensor node is proposed. Different from models ever showed, in which the power consumption of each component in WSN node was assumed constant, the new one takes into account energy dissipation of circuits in practical physical layer. It shows that there are some parameters such as data rate, carrier frequency, RF output power et al, which have a significant effect on the WSN node with the metric energy per useful bit (EPUB). Then an optimal design method to make the network energy efficient is described by adjusting one or more of these parameters. The efficiency of the strategy was validated by mathematical analysis and simulations. The results showed that the EPUB can be reduced by optimally choosing the ratepower combination based on the proposed power consumption model for a given load. © 2007 IEEE.

关键词： Electric power utilization

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