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作者： Yuan, Nan Yu, Lei Fan, Dong-Rui Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Graduate University of Chinese Academy of Sciences Beijing 100039 China

ISBN: (纸本)9783642245671

This paper presents the design and implementation of a runtime system (named "GodRunner") on Godson-T many-core processor to support task-level parallelism efficiently and flexibly. GodRunner abstracts underlying hardware resource, providing ease-of-use programming interface. A two-grade task management mechanism is proposed to support both coarse-grained and fine-grained multithreading efficiently. Two load-balanced scheduling policies are combined flexibly in GodRunner. The software-controlled task management makes GodRunner more configurable and extensible than hard-wired ones. The experiment shows that the tasking overhead in GodRunner is as small as hundreds of cycles, which is about the hundreds of times faster than the conventional Pthread based multithreading on a SMP machine. Furthermore, our approach scales well and supports fine-grained tasks as small as 20k cycles optimally. © 2011 Springer-Verlag Berlin Heidelberg.

关键词： computer architecture

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User-level failure detection and auto-recovery of parallel programs in HPC systems

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Frontiers of computer Science 2021年第6期15卷 31-42页

作者： Guozhen ZHANG Yi LIU Hailong YANG Jun XU Depei QIAN State Key Laboratory of Software Development Environment Beijing 100191China Sino-German Joint Software Institute Beihang UniversityBeijing 100191China School of Computer Science and Engineering Beihang UniversityBeijing 100191China Science and Technology on Space System Simulation Laboratory Beijing Simulation Center Beijing 100854China

As the mean-time-between-failures(MTBF)continues to decline with the increasing number of components on large-scale high performance computing(HPC)systems,program failures might occur during the execution period with high *** successful execution of the HPC programs has become an issue that the unprivileged users should be *** the user perspective,if the program failure cannot be detected and handled in time,it would waste resources and delay the progress of program ***,the unprivileged users are unable to perform program state checking due to execution control by the job management system as well as the limited ***,automated tools for supporting user-level failure detection and autorecovery of parallel programs in HPC systems are *** paper proposes an innovative method for the unprivileged user to achieve failure detection of job execution and automatic resubmission of failed *** state checker in our method is encapsulated as an independent job to reduce interference with the user *** addition,we propose a dual-checker mechanism to improve the robustness of our *** implement the proposed method as a tool named automatic re-launcher(ARL)and evaluate it on the Tianhe-2 *** results show that ARL can detect the execution failures effectively on Tianhe-2 *** addition,the communication and performance overhead caused by ARL is *** good scalability of ARL makes it applicable for large-scale HPC systems.

关键词： high performance computing parallel program failure detection failure auto-recovery

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Testable critical path selection considering process variation

Testable critical path selection considering process variati...

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作者： Fu, Xiang Li, Huawei Li, Xiaowei Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academic of Science Beijing 100190 China Graduate University of Chinese Academic of Sciences Beijing 100039 China

Critical path selection is very important in delay testing. Critical paths found by conventional static timing analysis (STA) tools are inadequate to represent the real timing of the circuit, since neither the testability of paths nor the statistical variation of cell delays caused by process variation is considered. This paper proposed a novel path selection method considering process variation. The circuit is firstly simplified by eliminating non-critical edges under statistical timing model, and then divided into sub-circuits, while each sub-circuit has only one prime input (PI) and one prime output (PO). Critical paths are selected only in critical sub-circuits. The concept of partially critical edges (PCEs) and completely critical edges (CCEs) are introduced to speed up the path selection procedure. Two path selection strategies are also presented to search for a testable critical path set to cover all the critical edges. The experimental results showed that the proposed circuit division approach is efficient in path number reduction, and PCEs and CCEs play an important role as a guideline during path selection. Copyright © 2010 The Institute of Electronics.

关键词： Delay circuits

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A unified online fault detection scheme via checking of stability violation 09

A unified online fault detection scheme via checking of stab...

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2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09

作者： Guihai, Yan Yinhe, Han Xiaowei, Li Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Graduate University Chinese Academy of Sciences Beijing 100039 China

ISBN: (纸本)9783981080155

In ultra-deep submicro technology, two of the paramount reliability concerns are soft errors and device aging. Although intensive studies have been done to face the two challenges, most take them separately so far, thereby failing to reach better performance-cost tradeoffs. To support a more efficient design tradeoff, we present a new fault model, Stability Violation, derived from analysis of signal behavior. Furthermore, we propose a unified fault detection scheme - Stability Violation based Fault Detection (SVFD), by which the soft errors (both Single Event Upset and Single Event Transient), aging delay, and delay faults can be uniformly handled. SVFD can greatly facilitate soft error-resistant and aging-aware designs. SVFD is validated by conducting a set of intensive Hspice simulations targeting 65nm CMOS technology. Experimental results show that SVFD has more robust capability for fault detection than previous schemes at comparable overhead in terms of area, power, and performance. © 2009 EDAA.

关键词： Fault detection

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Green challenges to system software in data centers

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Frontiers of Materials Science 2011年第3期5卷 353-368页

作者： Yuzhong SUN Yiqiang ZHAO Ying SONG Vajun YANG Haifeng FANG Hongyong ZANG Yaqiong LI Yunwei GAO Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Graduate University of Chinese Academy of Sciences Beijing 100190 China

With the increasing demand and the wide application of high performance commodity multi-core processors, both the quantity and scale of data centers grow dramatically and they bring heavy energy consumption. Researchers and engineers have applied much effort to reducing hardware energy consumption, but software is the true consumer of power and another key in making better use of energy. system software is critical to better energy utilization, because it is not only the manager of hardware but also the bridge and platform between applications and hardware. In this paper, we summarize some trends that can affect the efficiency of data centers. Meanwhile, we investigate the causes of software inefficiency. Based on these studies, major technical challenges and corresponding possible solutions to attain green system software in programmability, scalability, efficiency and software architecture are discussed. Finally, some of our research progress on trusted energy efficient system software is briefly introduced.

关键词： green software multi-core data center,power efficient system software

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A routing algorithm for random error tolerance in network-on-chip

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12th International Conference on Human-computer Interaction, HCI International 2007

作者： Zhang, Lei Li, Huawei Li, Xiaowei Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences 100080 Beijing China Graduate University Chinese Academy of Sciences Beijing 100080 China

ISBN: (纸本)9783540731092

In DSM and nanometer technology, there will present more and more new fault types, which are difficult to predict and avoid. Applying fault tolerant algorithms to achieve reliable on-chip communication is one of the most important issues of Network-on-Chip (NoC). This paper reviews the main on-chip fault tolerant communication algorithms and then proposes a new routing algorithm with end-to-end feedback. The average transmission latency, power consumption and reliability are compared with other techniques. As experiments show, the proposed algorithm has lower latency, lower power consumption compared with those of others, and it can provide high reliability. © Springer-Verlag Berlin Heidelberg 2007.

关键词： Routing algorithms

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Fetching primary and redundant instructions in turn for a fault-tolerant embedded microprocessor

Fetching primary and redundant instructions in turn for a fa...

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14th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2008

作者： Zhang, Shijian Hu, Weiwu Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100080 China Graduate School of the Chinese Academy of Sciences Beijing 100039 China

ISBN: (纸本)9780769534480

With the development of semiconductor technology, microprocessors become more and more susceptible to transient faults. Some proposed schemes support redundant execution of a program in a superscalar processor for fault tolerance. However, they require a huge queue to accommodate interim states, which enlarge the hardware cost significantly. This paper analyzes the effect of halving a processor's instruction fetch bandwidth on a program's performance. We find that the performance degradation resulted from halving instruction fetch bandwidth declines when instruction latency is lengthened, branch prediction accuracy deteriorates or cache miss rate increases. Since an embedded microprocessor is characterized by long instruction latency, high branch misprediction rate and cache miss rate, a fault-tolerant scheme is proposed, in which two threads fetch instructions in turn and execute in the same processor core simultaneously without any extra queue. The simulation results from eight embedded applications show that performance penalty of our solution ranges from 6.5% to 30.1%, with an average of 22.5%, which is lower than that of the other proposed schemes. The experiment also indicates that our scheme can effectively detect faults occurring in the entire pipeline with short fault detection latency and minimal hardware cost. It is well suited for our solution to realize a reliable embedded microprocessor. © 2008 IEEE.

关键词： Fault detection

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Supporting Various Top-k Queries over Uncertain Datasets

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Wuhan University Journal of Natural Sciences 2014年第1期19卷 84-92页

作者： LI Wenfeng FU Zufa WANG Liwei LI Deyi PENG Zhiyong State Key Laboratory of Software Engineering Wuhan University School of Computer Wuhan University International School of Software Wuhan University Institute of Electronic System Engineering of China

There have been many researches and semantics in answering top-k queries on uncertain data in various applications. However, most of these semantics must consume much of their time in computing position probability. Our approach to support various top-k queries is based on position probability distribution （PPD） sharing. In this paper, a PPD-tree structure and several basic operations on it are proposed to support various top-k queries. In addition, we proposed an approximation method to improve the efficiency of PPD generation. We also verify the effectiveness and efficiency of our approach by both theoretical analysis and experiments.

关键词： top-k queries uncertain data position probability distribution

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Polarization-induced photocurrent switching effect in heterojunction photodiodes

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Nano Research 2023年第4期16卷 5503-5510页

作者： Dingbo Chen Yu-Chang Chen Guang Zeng Yu-Chun Li Xiao-Xi Li Dong Li Chao Shen Nan Chi Boon S.Ooi David Wei Zhang Hong-Liang Lu State Key Laboratory of ASIC and System Shanghai Institute of Intelligent Electronics&SystemsSchool of MicroelectronicsFudan UniversityShanghai 200433China Key Laboratory for Information Science of Electromagnetic Waves Department of Communication Science and EngineeringFudan UniversityShanghai 200433China Photonics Laboratory Division of ComputerElectricaland Mathematical Sciences and EngineeringKing Abdullah University of Science and Technology(KAUST)Thuwal 23955-6900Kingdom of Saudi Arabia

The unipolar photocurrent in conventional photodiodes(PDs)based on photovoltaic effect limits the output modes and potential versatility of these devices in *** photodiodes with photocurrent switching are emerging as a promising solution for obtaining photoelectric devices with unique and attractive functions,such as optical logic ***,we design an all-solid-state chip-scale ultraviolet(UV)PD based on a hybrid GaN heterojunction with engineered bipolar polarized electric *** introducing the polarization-induced photocurrent switching effect,the photocurrent direction can be switched in response to the wavelength of incident light at 0 V *** particular,the photocurrent direction exhibits negative when the irradiation wavelength is less than 315 nm,but positive when the wavelength is longer than 315 *** device shows a responsivity of up to−6.7 mA/W at 300 nm and 5.3 mA/W at 340 nm,*** particular,three special logic gates in response to different dual UV light inputs are demonstrated via a single bipolar PD,which may be beneficial for future multifunctional UV photonic integrated devices and systems.

关键词： GaN heterostructure ultraviolet(UV)photodiodes bipolar photocurrent optical logic device

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High extinction ratio and low driver electro-refrative phase modulator with double graphene layers

High extinction ratio and low driver electro-refrative phase...

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Asia Communications and Photonics Conference, ACPC 2015

作者： Su, Zhaotang Deng, Qingzhong Zhang, Zexuan Wang, Xingjun Zhou, Zhiping State Key Laboratory of Advanced Optical Communications System and Networks School of Electronics Engineering and Computer Science Peking University Beijing100871 China

A Mach-Zehnder optical modulator with double graphene layers on silicon waveguide, utilizing the electro-refraction effects of the graphene, is demonstrated with great extinction ratio of 43.6 dB and low dynamic drive... 详细信息

ISBN: (纸本)9781943580064

关键词： Graphene

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