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Cepstrum Lifting and Coherent Averaging-based Instantaneous Frequency Estimation of Low-Amplitude Signal Components for Rotating Machinery

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IEEE Sensors Journal 2025年第10期25卷 17479-17490页

作者： Liu, Shaokang Liu, Shuai Wu, Yingjie Liu, Weiliang Liu, Changliang Luo, Zhihong University of North China Electric Power Control and Computer Engineering Department Beijing102200 China Baoding key Laboratory of State Detection and Optimization Regulation for Integrated Energy System Baoding071000 China University of Northeast Electric Power Automation Engineering Department Jilin132000 China Inner Mongolia University of Technology Electric Power Department Hohhot010080 China

Instantaneous frequency (IF) serves multiple critical functions in the prognostic and health management of rotating machinery. Current IF estimation methodologies primarily concentrate on enhancing estimation accuracy at the algorithmic level. However, in practical industrial applications, the target signal component is often influenced by varying operating conditions, structural resonances, and background noise, causing it to become submerged or even disappear, ultimately resulting in the failure of conventional IF estimation techniques. To address these challenges, a novel IF estimation approach incorporating signal quality enhancement is developed. First, the complementary multi-source vibration signal is processed by the proposed segmented cepstrum lifting method to overcome the submersion of the resonant frequency band on the target component. Then, processed segmented signals are fused using coherent averaging technology to enhance the amplitude of the target component. Finally, leveraging the first-order approximation capability of the short-time fractional Fourier transform (STFrFT) for nonlinear frequency modulation modes, precise IF estimation is achieved. Verified by field data, the proposed method outperforms mainstream methods in both accuracy and applicability, highlighting its industrial application prospects. © 2025 IEEE.

关键词： Frequency estimation

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Green challenges to system software in data centers

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中国计算机科学前沿 2011年第3期5卷 353-368页

作者： Yuzhong SUN Yiqiang ZHAO Ying SONG Yajun YANG Haifeng FANG Hongyong ZANG Yaqiong LI Yunwei GAO Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Graduate University of Chinese Academy of Sciences Beijing 100190 China

With the increasing demand and the wide application of high performance commodity multi-core processors,both the quantity and scale of data centers grow dramatically and they bring heavy energy *** and engineers have applied much effort to reducing hardware energy consumption,but software is the true consumer of power and another key in making better use of *** software is critical to better energy utilization,because it is not only the manager of hardware but also the bridge and platform between applications and *** this paper,we summarize some trends that can affect the efficiency of data ***,we investigate the causes of software *** on these studies,major technical challenges and corresponding possible solutions to attain green system software in programmability,scalability,efficiency and software architecture are ***,some of our research progress on trusted energy efficient system software is briefly introduced.

关键词： green software multi-core data center power efficient system software

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Design-for-Testability Features and Test Implementation of a Giga Hertz General Purpose Microprocessor

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Journal of computer Science & Technology 2008年第6期23卷 1037-1046页

作者：王达胡瑜李华伟李晓维 Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences Graduate University of Chinese Academy of Sciences

This paper describes the design-for-testability （DFT） features and low-cost testing solutions of a general purpose microprocessor. The optimized DFT features are presented in detail. A hybrid scan compression structure was executed and achieved compression ratio more than ten times. Memory built-in self-test （BIST） circuitries were designed with scan collars instead of bitmaps to reduce area overheads and to improve test and debug efficiency. The implemented DFT framework also utilized internal phase-locked loops （PLL） to provide complex at-speed test clock sequences. Since there are still limitations in this DFT design, the test strategies for this case are quite complex, with complicated automatic test pattern generation （ATPG） and debugging flow. The sample testing results are given in the paper. All the DFT methods discussed in the paper are prototypes for a high-volume manufacturing （HVM） DFT plan to meet high quality test goals as well as slow test power consumption and cost.

关键词： microprocessor design-for-testability test generation built-in self-test at-speed testing

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Small Signal Stability-Guaranteed Moving Target Defense Against Load Redistribution Attack On IoT-based Smart Grid

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IEEE Internet of Things Journal 2025年

作者： Wang, Bingdong Zhang, Zhenyong Wang, Mufeng Liu, Mengxiang Ye, Rui Deng, Ruilong Zhang, Xin Guizhou University State Key Laboratory of Public Big Data College of Computer Science and Technology Guiyang550025 China China Industrial Control Systems Cyber Emergency Response Team Beijing100040 China University of Sheffield Department of Automatic Control and System Engineering Sheffield United Kingdom Guizhou Power Grid Co. Ltd. Intelligent Operation Center China Zhejiang University State Key Laboratory of Industrial Control Technology College of Control Science and Engineering Hangzhou310027 China Huzhou Institute of Industrial Control Technology Huzhou313000 China

Moving target defense (MTD) is a promising approach to defend against load redistribution attacks on the internet-of-things (IoT)-based smart grid networks by probing the distorted state estimates with the distributed flexible AC transmission system. However, existing studies mainly focus on optimizing the performance of MTD and ignore the safety effect of it on the system’s operation. In this paper, we fill this gap by deeply analyzing the effect of MTD on the small signal stability and aim to alleviate the negative impact and guarantee its defending performance simultaneously. Firstly, the stability is formally described using the eigenvalue sensitivity. The relationship between the MTD-induced perturbation (MTDper) and the stability criteria is derived. Secondly, a new indicator is proposed to measure the effectiveness of MTDper. Thirdly, a constrained optimization problem is formulated to compute the bound of MTDper for guaranteeing the small signal stability. In addition, a surprising finding is that the stability margin can be improved and enhanced by optimizing the value of MTDper without losing the MTD’s effectiveness. Finally, we evaluate the performance of MTDper and its impact on the small signal stability with extensive simulations on the IEEE 30-bus, 39-bus, and 68-bus test power systems. © 2014 IEEE.

关键词： Constrained optimization

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Selected Crosstalk Avoidance Code for Reliable Network-on-Chip

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Journal of computer Science & Technology 2009年第6期24卷 1074-1085页

作者：张颖李华伟李晓维 Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Graduate School of the Chinese Academy of Sciences

With the shrink of the technology into nanometer scale, network-on-chip （NOC） has become a reasonable solution for connecting plenty of IP blocks on a single chip. But it suffers from both crosstalk effects and single event upset （SEU）, especially crosstalk-induced delay, which may constrain the overall performance of NOC. In this paper, we introduce a reliable NOC design using a code with the capability of both crosstalk avoidance and single error correction. Such a code, named selected crosstalk avoidance code （SCAC） in our previous work, joins crosstalk avoidance code （CAC） and error correction code （ECC） together through codeword selection from an original CAC codeword set. It can handle possible error caused by either crosstalk effects or SEU. When designing a reliable NOC, data are encoded to SCAC codewords and can be transmitted rapidly and reliably across NOC. Experimental results show that the NOC design with SCAC achieves higher performance and is reliable to tolerate single errors. Compared with previous crosstalk avoidance methods, SCAC reduces wire overhead, power dissipation and the total delay. When SCAC is used in NOC, it can save 20% area overhead and reduce 49% power dissipation.

关键词： crosstalk avoidance codeword selection reliable network-on-chip single event upset

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Landing Stencil Code on Godson-T

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Journal of computer Science & Technology 2010年第4期25卷 886-894页

作者：崔慧敏王蕾范东睿冯晓兵 Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences Graduate University of Chinese Academy of Sciences

The advent of multi-core/many-core chip technology offers both an extraordinary opportunity and a profound challenge. In particular, computer architects and system software designers are faced with a unique opportunity to introducing new architecture features as well as adequate compiler technology -- together they may have profound impact. This paper presents a case study （using the 1-D Jacobi computation） of compiler-amendable performance optimization techniques on a many-core architecture Godson-T. Godson-T architecture has several unique features that are chosen for this study： 1） chip-level global addressable memory in particular the scratchpad memories （SPM） local to the processing cores; 2） fine-grain memory based synchronization （e.g., full-empty bit for fine-grain synchronization）. Leveraging state-of-the-art performance optimization methods for 1-D stencil parallelization （e.g., timed tiling and variants）, we developed and implement a number of many-core-based optimization for Godson-T. Our experimental study shows good performance in both execution time speedup and scalability, validate the value of globally accessed SPM and fine-grain synchronization mechanism （full-empty bits） under the Godson-T, and provides some useful guidelines for future compiler technology of many-core chip architectures.

关键词： many-core, stencil, Jacobi, compiler SPM, fine-grain synchronization

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Methodology, progress and challenges of geoscience knowledge graph in International Big Science Program of Deep-Time Digital Earth

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Journal of Geographical Sciences 2025年第5期35卷 1132-1156页

作者： Zhu, Yunqiang Wang, Qiang Wang, Shu Sun, Kai Wang, Xinbing Lv, Hairong Hu, Xiumian Zhang, Jie Wang, Bin Qiu, Qinjun Yang, Jie Zhou, Chenghu State Key Laboratory of Resources and Environmental Information System Institute of Geographic Sciences and Natural Resources Research CAS Beijing China Jiangsu Center for Collaborative Innovation in Geographical Information Resource Development and Application Nanjing China University of Chinese Academy of Sciences Beijing China School of Electronic Information and Electrical Engineering Shanghai Jiao Tong University Shanghai China Department of Automation Tsinghua University Beijing China State Key Laboratory for Mineral Deposits Research School of Earth Sciences and Engineering Nanjing University Nanjing China State Key Laboratory of Information Photonics and Optical Communications Beijing University of Posts and Telecommunications Beijing China Command Center of Natural Resources Comprehensive Survey China Geological Survey Beijing China School of Computer Science China University of Geosciences Wuhan China

Deep-time Earth research plays a pivotal role in deciphering the rates, patterns, and mechanisms of Earth’s evolutionary processes throughout geological history, providing essential scientific foundations for climate prediction, natural resource exploration, and sustainable planetary stewardship. To advance Deep-time Earth research in the era of big data and artificial intelligence, the International Union of Geological Sciences initiated the “Deep-time Digital Earth International Big Science Program” (DDE) in 2019. At the core of this ambitious program lies the development of geoscience knowledge graphs, serving as a transformative knowledge infrastructure that enables the integration, sharing, mining, and analysis of heterogeneous geoscience big data. The DDE knowledge graph initiative has made significant strides in three critical dimensions: (1) establishing a unified knowledge structure across geoscience disciplines that ensures consistent representation of geological entities and their interrelationships through standardized ontologies and semantic frameworks; (2) developing a robust and scalable software infrastructure capable of supporting both expert-driven and machine-assisted knowledge engineering for large-scale graph construction and management; (3) implementing a comprehensive three-tiered architecture encompassing basic, discipline-specific, and application-oriented knowledge graphs, spanning approximately 20 geoscience disciplines. Through its open knowledge framework and international collaborative network, this initiative has fostered multinational research collaborations, establishing a robust foundation for next-generation geoscience research while propelling the discipline toward FAIR (Findable, Accessible, Interoperable, Reusable) data practices in deep-time Earth systems research.

关键词： Deep-time Digital Earth International Big Science Program deep-time Earth geoscience knowledge graph

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Biomedical data and AI

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Science China Life Sciences 2025年第5期68卷 1536-1540页

作者： Hao Xu Shibo Zhou Zefeng Zhu Vincenzo Vitelli Liangyi Chen Ziwei Dai Ning Yang Luhua Lai Shengyong Yang Sergey Ovchinnikov Zhuoran Qiao Sirui Liu Chen Song Jianfeng Pei Han Wen Jianfeng Feng Yaoyao Zhang Zhengwei Xie Yang-Yu Liu Zhiyuan Li Fulai Jin Hao Li Mohammad Lotfollahi Xuegong Zhang Ge Yang Shihua Zhang Ge Gao Pulin Li Qi Liu Jing-Dong Jackie Han Peking-Tsinghua Center for Life Sciences (CLS) Academy for Advanced Interdisciplinary StudiesPeking University Center for Quantitative Biology (CQB) Academy for Advanced Interdisciplinary StudiesPeking University Peking University-Tsinghua University-National Institute of Biological Sciences Joint Graduate Program Academy for Advanced Interdisciplinary StudiesPeking University Department of Physics University of Chicago School of Life Sciences Southern University of Science and Technology Peking University Chengdu Academy for Advanced Interdisciplinary Biotechnologies College of Chemistry and Molecular Engineering Peking University Department of Biotherapy Cancer Center and State Key Laboratory of BiotherapyWest China HospitalSichuan University Department of Biology Massachusetts Institute of Technology Lambic Therapeutics Inc. Changping Laboratory Al for Science Institute Key Laboratory of Computational Neuroscience and Brain-Inspired Intelligence Fudan University Department of Obstetrics and Gynecology West China Second University HospitalSichuan University Peking University International Cancer Institute and Peking University-Yunnan Baiyao International Medical Institute and State Key Laboratory of Natural and Biomimetic Drugs Department of Molecular and Cellular PharmacologySchool of Pharmaceutical SciencesPeking University Health Science CenterPeking University Channing Division of Network Medicine Department of MedicineBrigham and Women's Hospital and Harvard Medical School Center for Artificial Intelligence and Modeling the Carl R.Woese Institute for Genomic BiologyUniversity of Illinois Urbana-Champaign Department of Genetics and Genome Sciences School of Medicine and Department of Computer and Data Sciences and Department of Population and Quantitative Health SciencesCase Western Reserve University Department of Biochemistry and Biophysics University of California Sanger Institute Department of Automation Tsinghua University State Key Laboratory of Multimodal Artificial Intelligence Systems I

The development of artificial intelligence(AI) and the mining of biomedical data complement each other. From the direct use of computer vision results to analyze medical images for disease screening, to now integrating biological knowledge into models and even accelerating the development of new AI based on biological discoveries, the boundaries of both are constantly expanding, and their connections are becoming closer.

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Online Distributed Fault Detection of Sensor Measurements

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Tsinghua Science and Technology 2007年第S1期12卷 192-196页

作者：高建良徐勇军李晓维 Key Laboratory of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences

In wireless sensor networks (WSNs), a faulty sensor may produce incorrect data and transmit them to the other sensors. This would consume the limited energy and bandwidth of WSNs. Furthermore, the base station may make inappropriate decisions when it receives the incorrect data sent by the faulty sensors. To solve these problems, this paper develops an online distributed algorithm to detect such faults by exploring the weighted majority vote scheme. Considering the spatial correlations in WSNs, a faulty sensor can diagnose itself through utilizing the spatial and time information provided by its neighbor sensors. Simulation results show that even when as many as 30% of the sensors are faulty, over 95% of faults can be correctly detected with our algorithm. These results indicate that the proposed algorithm has excellent performance in detecting fault of sensor measurements in WSNs.

关键词： wireless sensor networks fault diagnosis fault detection fault tolerance spatial correlation

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An Intra-Server Interconnect Fabric for Heterogeneous Computing

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Journal of computer Science & Technology 2014年第6期29卷 976-988页

作者：曹政Zheng Cao 刘小丽李强刘小兵王展安学军 CCF ACM State Key Laboratory of Computer Architecture Institute of Computing TechnologyChinese Academy of Sciences

With the increasing diversity of application needs and computing units, the server with heterogeneous pro- cessors is more and more widespread. However, conventional SMP/ccNUMA server architecture introduces communication bottleneck between heterogeneous processors and only uses heterogeneous processors as coprocessors, which limits the efficiency and flexibility of using heterogeneous processors. To solve this problem, this paper proposes an intra-server inter- connect fabric that supports both intra-server peer-to-peer interconnection and I/O resource sharing among heterogeneous processors. By connecting processors and I/O devices with the proposed fabric, heterogeneous processors can perform direct communication with each other and run in stand-alone mode with shared intra-server resources. We design the proposed fabric by extending the de-facto system I/O bus protocol PCIe （Peripheral computer Interconnect Express） and implement it with a single chip cZodiac. By making full use of PCIe＇s original advantages, the interconnection and the I/O sharing mechanism are light weight and efficient. Evaluations that have been carried out on both the FPGA （Field Programmable Gate Array） prototype and the cycle-accurate simulator demonstrate that our design is feasible and scalable. In addition, our design is suitable for not only the heterogeneous server but also the high density server.

关键词： heterogeneous system interconnection I/O virtualization PCI-express

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