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Real-time optical spike-timing dependent plasticity in a single VCSEL with dual-polarized pulsed optical injection

Science China(Information Sciences) 2020年第6期63卷 143-154页

作者： Shuiying XIANG Yanan HAN Xingxing GUO Aijun WEN Genquan HAN Yue HAO State Key Laboratory of Integrated Service Networks Xidian University State Key Discipline Laboratory of Wide Bandgap Semiconductor Technology School of MicroelectronicsXidian University

We propose and numerically realize an optical spike-timing dependent plasticity(STDP) scheme by using a single vertical-cavity surface-emitting laser(VCSEL). In the scheme, the VCSEL is subjected to an orthogonally-polarized continuous-wave optical injection(OPCWOI) and dual-polarized pulsed optical injections(DPPOI). Based on the widely used spin-flip model, the response spiking dynamics of VCSEL is numerically studied, and then the optical STDP in a single VCSEL is explored. The roles of bias current, the strength of OPCWOI and DPPOI, and the frequency detuning on the optical STDP curve are numerically analyzed. It is found that, by simultaneously utilizing the response spiking dynamics in two orthogonal polarization modes, an optical STDP could be achieved by using a single VCSEL. Furthermore, the weight update of STDP curve can be calculated in real-time. Additionally, the STDP curves can also be controlled by adjusting some controllable parameters. The real-time optical STDP based on a single VCSEL is numerically realized for the first time, which paves the way towards fully VCSELs-based photonic neuromorphic systems with low power consumption.

关键词： vertical-cavity surface-emitting laser optical spike-timing dependent plasticity neuromorphic photonic system dual polarized pulsed optical injections artificial intelligent systems

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Design of broadband and low-profile polarization artificial structure for the application of low scattering control 15

Design of broadband and low-profile polarization artificial ...

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15th International Conference on Microwave and Millimeter Wave technology, ICMMT 2023

作者： Li, Fengxia Chen, Haiyan Deng, Jing-Ya Xidian University School of Physics Xi'an710071 China University of Electronic Science and Technology of China National Engineering Research Center of Electromagnetic Radiation Control Materials Key Laboratory of Multi-Spectral Absorbing Materials and Structures of Ministry of Education State Key Laboratory of Electronic Thin Film and Integrated Device Chengdu610054 China

ISBN: (纸本)9798350338874

here, we proposed a broadband and low-profile polarization artificial structure which based on SRR resonant rings, this structure also has the property of high-efficiency and wide-angle. The polarization conversion ratio is over 90% from 8.6 GHz to 23.9 GHz. The low-scattering metasurface for radar cross section (RCS) reduction is designed by arranging the polarization conversion unit and its mirror unit as the checkerboard type according to the phase cancellation principle. The relative bandwidth of 10dB RCS reduction is up to 93%, and the maximum reduction value reaches to 43.7dB. Such a low-scattering metasurface scheme has applications in scattering control, stealth, and security. © 2023 IEEE.

关键词： Polarization

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Cost-Effective 1200 V SiC MOSFETs on a Novel 150 mm SiC Engineered Substrate with Dummy-Grade Material Reuse

Cost-Effective 1200 V SiC MOSFETs on a Novel 150 mm SiC Engi...

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2024 IEEE International Electron devices Meeting, IEDM 2024

作者： Wang, Xinhua Xing, Xiangjie Yang, Xiaolei Yang, Xin Chen, Yan Ma, Guoliang Wang, Bixuan Zhao, Zhifei Yuan, Chao Bai, Yun Huang, Sen Lei, Yipei Shi, Jingyuan Liu, Fuchao Zhang, Yuhao Mu, Fenwen Liu, Xinyu Liu, Sheng Hao, Yue HF&HV Device and Integrate Center Institute of Microelectronics Chinese Academy of Science Beijing China State Key Laboratory of WBS Devices and Integrated Technology Nanjing Electronic Devices Institute Nanjing China Center for Power Electronics Systems Virginia Tech BlacksburgVA United States Institute of Technological Sciences Wuhan University Wuhan China TJ Innovative Semiconductor Substrate Technology Co. Ltd Tianjing China Xidian University Xi’an China

ISBN: (纸本)9798350365429

The SiC substrate cost accounts for >50% of final device cost, and its manufacturing suffers from a high carbon footprint. To address this challenge, this work demonstrates a novel 150 mm single-crystal SiC engineered substrate, which homogeneously integrates a prime-grade SiC layer onto a dummy-grade SiC substrate by surface-active bonding. This engineered substrate reuses low-grade SiC substrates, which are often disposed as wastes in the MOSFET industrial production, as well as recycling the high-grade wafer for over 30 times. It thus can enable a drastic reduction in the substrate cost (by ~40%) and the associated carbon footprint. The engineered substrate demonstrates a defect density as low as prime-grade substrate, a low thermal boundary resistance (TBR) of 2.8 m2K/GW, as well as very small electric field at the bonded interface. The TBR is among the lowest reported for the SiC interfaces bonded with SiC, GaN, and Ga2O3. The 150 mm, 1200 V-class SiC epi grown on this substrate achieved a high killer-defect-free yield of 99.2%. The 1200 V, 20 mΩ SiC MOSFETs fabricated on this 150 mm epi demonstrate a yield over 70% (for IDSS250 A, 10 ms surge current. To the best of our knowledge, this is the first report of the wafer-level device data and high-current robustness for a SiC engineering substrate. These results show the great potential of this new substrate technology to enable more economical and sustainable SiC power electronics. © 2024 IEEE.

关键词： MOSFET devices

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Reliable Ge_(2)Sb_(2)Te_(5) based phase-change electronic synapses using carbon doping and programmed pulses

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Journal of Materiomics 2022年第2期8卷 382-391页

作者： Qiang Wang Gang Niu Ruobing Wang Ren Luo Zuo-Guang Ye Jinshun Bi Xi Li Zhitang Song Wei Ren Sannian Song Electronic Materials Research Laboratory Key Laboratory of the Ministry of Education&International Center for Dielectric ResearchSchool of Electronic Science and EngineeringXi'an Jiaotong UniversityXi'an710049China State Key Laboratory of Functional Materials for Informatics Shanghai Institute of Microsystem and InformationTechnologyChinese Academy of Sciences865 Changning RoadShanghai200050China Department of Chemistry and 4D LABS Simon Fraser UniversityBurnabyBritish ColumbiaV5A 1S6Canada Key Laboratory of Microelectronics Device and Integrated Technology The Institute of Microelectronics of Chinese Academy of SciencesBeijing100029China University of Chinese Academy of Sciences Beijing100049China

Hardware electronic synapse and neuro-inspired computing system based on phase change random access memory(PCRAM)have attracted an extensive ***,due to the intrinsic asymmetric reversible phase transition,the defective weight update of PCRAM synapses in aspects of tuning range,linearity and continuity has long required a system-level complexity of circuits and *** cell-level improvements to a great extent may slim the system thus achieving efficient *** report in this work the great enhancement of Ge_(2)Sb_(2)Te_(5)(GST)based PCRAM synapses by combining materials engineering and pulse *** is found that carbon doping in GST retards the rate of phase changing thus increasing the controllability of the conductance,while non-linear programmable pulse excitations can eventually lead to a reliable synaptic potentiation and depression.A set of improved programmable pulse schemes for spike-timing dependent plasticity was then demonstrated,suggesting its potential superiority in flexible programming and reliable data *** methods and results are of great significance for implementing PCRAM electronic synapses and high-performance neuro-inspired computing.

关键词： Programmable synapse Synaptic simulation PCRAM C-doped Ge_(2)Sb_(2)Te_(5) Electronic synapse

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A Chaos-RC4 Encryption Algorithm based on Memristive Neural Network 2

A Chaos-RC4 Encryption Algorithm based on Memristive Neural ...

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2nd IEEE International Conference on Electronic technology, Communication and Information, ICETCI 2022

作者： Liu, Yi'an Liu, Yili Liu, Shuang Li, Guo Liu, Yang University of Electronic Science and Technology of China State Key Laboratory of Electronic Thin Films and Integrated Devices Chengdu610054 China Chongqing Institute of Microelectronics Industry Technology Uestc Chongqing401332 China

ISBN: (纸本)9781728181158

This paper proposes an algorithm based on memristive neural network to realize Rivest Cipher 4 (RC4) encryption, which effectively releases the correlation between the input key and the output key stream of the RC4 algorithm. At the same time, this design improves both key Schedule Algorithm (KSA) and Pseudo Random Generation Algorithm (PRGA) of RC4 stream cipher. In the KSA process, a neural network with chaos is constructed by utilizing the non-linearity characteristics of the memristor, and the generated chaotic sequence having good randomness performance, is used as the input key of the RC4 algorithm to realize 'one time one secret' dynamic encryption. In the PRGA process, another sequence generated randomly by memristive neural network is used for a dynamic chaotic permutation on the data table of the S-box. Experiment results demonstrate the effectiveness of the algorithm, and show it has larger key space, higher security and stronger robustness than the traditional algorithm. © 2022 IEEE.

关键词： Memristors

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A Monolithic GaN Power Stage with Low Propagation Delay and High Reliability Level Shifting for High Frequency Power Converter

A Monolithic GaN Power Stage with Low Propagation Delay and ...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： Rongxing Lai Zekun Zhou Jinyang He Siyu Yu William Li Bo Zhang State Key Laboratory of Electronic Thin Films and Integrated Device University of Electronic Science and Technology of China Chengdu China

In this article, a monolithic gallium nitride (GaN)-based half-bridge power stage is proposed for high frequency power converter. A level shifting technique with buffering device and shielding capacitance is designed to perform communications in half-bridge topologies with high reliability and low propagation delay. To prevent the missing pulse or output latch during deadtime, a negative voltage pull-down circuit is designed. Implemented with a $0.25\mu \mathrm{m}$ 15-V enhanced mode GaN (eGaN) process, this work consists of optimized delay matching, monolithic gate drivers and power high electron mobility transistors(HEMTs) as well. The implementation results show that this work can achieve a propagation delay of no more than 6.5ns, a delay mismatch within 2.5ns and a CMTI capability above 150V/ns at 30Mhz switching frequency.

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A Novel 1200-V Class SiC MOSFET with Schottky Barrier Diode for Improved third quadrant performance 15

A Novel 1200-V Class SiC MOSFET with Schottky Barrier Diode ...

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15th IEEE International Conference on ASIC, ASICON 2023

作者： Kong, Moufu Lin, Zhi Deng, Hongfei Yi, Bo Jin, Rui Yang, Hongqiang University of Electronic Science and Technology of China State Key Laboratory of Electronic Thin Films and Integrated Devices of China Chengdu China Chongqing University School of Microelectronics and Communication Engineering Chongqing China Huairou Laboratory Future Science City Smart Energy Research Centre Beijing China

ISBN: (纸本)9798350312980

A novel Schottky barrier diode (SBD) integrated Silicon carbide (SiC) asymmetric MOSFET structure is proposed in this paper. The proposed SiC MOSFET allows the integration of a Schottky barrier diode without requiring additional chip area. This design circumvents performance degradation issues arising from the bipolar degradation effect, which occurs due to the accumulation of stacking layer errors in the drift region during the conduction of the body PN diode in conventional SiC MOSFETs. Moreover, the knee voltage of the integrated SBD in the proposed structure is only one-third of body diode in the conventional structure, resulting in an enhanced performance in the third quadrant of the SiC MOSFET. © 2023 IEEE.

关键词： reverse recovery Schottky diode Silicon carbide MOSFET switching time

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Physical Layer Security of IRS-Assisted Multi-Layer Heterogeneous Networks in Smart Grid

Physical Layer Security of IRS-Assisted Multi-Layer Heteroge...

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2022 International Conference on Computing, Communication, Perception and Quantum technology, CCPQT 2022

作者： Guo, Yuchen Liu, Geng Ren, Jie Liu, Ying Yao, Liang Cao, Yu Chen, Jian Zhou, Yuchen Xidian University State Key Laboratory of Integrated Services Networks Xi'an China Smart Shine Microelectronics Technology Co. Ltd. QingDao China Beijing Smart-chip Microelectronics Technology Co. Ltd. BeiJing China

ISBN: (数字)9781665470209

ISBN: (纸本)9781665470209

With the deployment of large-scale intelligent terminals in 5G Smart Grid, more communication and computing resources will be sunk to the network edge to meet the ultra-reliable and low-latency requirements of communication networks. However, for the inevitable co-channel interference between adjacent cells, traditional solutions may lead to lower spectrum efficiency or poor signal quality of edge-users. In our work, intelligent reflecting surface (IRS) is used to solve the problem of co-channel interference caused by frequency reuse and improve the transmission capacity of the system. In addition, for the secure transmission issues of massive amount of information in Smart Grid, a low-cost and low-complexity physical layer security transmission scheme is proposed in our work to realize secure transmission. Our work aims at maximizing the system sum-rate by optimizing the transmit beamforming vector at the macro base station (MBS) and multiple micro base stations (mBSs), and the reflection beamforming vector at the IRS with the guarantee of secure communications. Subsequently, the optimization problem is transformed into a convex form, and a non-alternating optimization algorithm based on variable decoupling is designed to obtain high-quality suboptimal solutions. The simulation results show the effectiveness and advantages of the proposed scheme. © 2022 IEEE.

关键词： Heterogeneous networks

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A Novel Punch through Breakdown Trench MOS with Self-Adjustable Resistor for Low Temperature Coefficient of Breakdown Voltage 5

A Novel Punch through Breakdown Trench MOS with Self-Adjusta...

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5th IEEE International Conference on Electronics technology, ICET 2022

作者： Wang, Tongyang Li, Zehong Huang, Lingxuan Liu, Xiaohan University of Electronic Science and Technology of China State Key Laboratory of Electronic Thin Films and Integrated Devices Chengdu China Chongqing Institute of Microelectronics Industry Technology University of Electronic Science and Technology of China Chongqing China

ISBN: (纸本)9781665485081

In this paper, a novel punch through breakdown trench MOS with self-adjustable resistor (SAR-PT-TMOS) is proposed for low temperature coefficient of breakdown voltage. The SAR-PT-TMOS features a P-doping self-adjustable resistor (SAR) which is connected to the source electrode and sandwiched by the trench gate and N-source region. As the temperature increases, the width of space charge region between the P-SAR region and the N-source region decreases, which further increases the width of SAR and decreases the resistance of SAR. Therefore, the voltage drop across SAR has a negative temperature coefficient and provides a negative feedback voltage for the breakdown voltage. As a result, the temperature coefficient of breakdown voltage can be reduced by 94.7% compared with that of the conventional punch through breakdown trench MOS (PTTMOS) with only 12.7% increment of on-state voltage drop. © 2022 IEEE.

关键词： Temperature

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通过高通量研究识别用于本征陡坡晶体管的原子级薄孤立能带沟道材料

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Science Bulletin 2024年第10期69卷 1427-1436页

作者：屈恒泽张胜利曹江吴振华柴扬李卫胜李连忠任文才王欣然曾海波 MIIT Key Laboratory of Advanced Display Materials and Devices College of Material Science and EngineeringNanjing University of Science and TechnologyNanjing 210094China School of Electronic and Optical Engineering Nanjing University of Science and TechnologyNanjing 210094China Key Laboratory of Microelectronics Device and Integrated Technology Institute of Microelectronics of Chinese Academy of SciencesBeijing 100029China Department of Applied Physics The Hong Kong Polytechnic UniversityHong Kong 999077China National Laboratory of Solid State Microstructures School of Electronic Science and Engineering and Collaborative Innovation Center of Advanced MicrostructuresNanjing UniversityNanjing 210023China Department of Mechanical Engineering The University of Hong KongHong Kong 999077China Shenyang National Laboratory for Materials Science Institute of Metal ResearchChinese Academy of SciencesShenyang 110016China School of Integrated Circuits Nanjing UniversitySuzhou 215163China Suzhou Laboratory Suzhou 215009China

Developing low-power FETs holds significant importance in advancing logic circuits,especially as the feature size of MOSFETs approaches sub-10 ***,this has been restricted by the thermionic limitation of SS,which is limited to 60 mV per decade at room ***,we proposed a strategy that utilizes 2D semiconductors with an isolated-band feature as channels to realize subthermionic SS in *** high-throughput calculations,we established a guiding principle that combines the atomic structure and orbital interaction to identify their sub-thermionic transport *** guides us to screen 192 candidates from the 2D material database comprising 1608 ***,the physical relationship between the sub-thermionic transport performances and electronic structures is further revealed,which enables us to predict 15 systems with promising device performances for low-power applications with supply voltage below 0.5 *** work opens a new way for the low-power electronics based on 2D materials and would inspire extensive interests in the experimental exploration of intrinsic steep-slope MOSFETs.

关键词： 2D materials Electronic band structures Transport properties Steep-slope transistors DFT-NEGF calculations

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