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GPOS: A General and Precise Offloading Strategy for High Generality of DNN Acceleration by OCP and NDP Co-optimizing

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IEEE Transactions on Computer-Aided Design of integrated Circuits and Systems 2025年

作者： Li, Zixu Wang, Wang Li, Manni Yang, Jiayu Huang, Zijian Zhong, Xin Lin, Yinyin Wang, Chengchen Xiong, Xiankui Fudan University State Key Laboratory of Integrated Chips and Systems School of Microelectronics Shanghai201203 China ZTE Corporation State Key Laboratory of Mobile Multimedia Technology Shenzhen518055 China

The arithmetic intensity (ArI) of different DNNs can be opposite. This challenges the generality of single acceleration architectures, including both dedicated on-chip processing (OCP) and near-data processing (NDP). Neither architecture can simultaneously achieve optimal energy efficiency and performance for operators with opposite ArI. It is relatively straightforward to think of combining the respective advantages of OCP and NDP. However, few publications have addressed their real-time co-optimization, primarily due to the lack of a quantifiable offloading method. Here, we propose GPOS, a general and precise offloading strategy that supports high generality of DNN acceleration. GPOS comprehensively considers the complex interactions between OCP and NDP, including hardware configurations, dataflow (DF), DNN model, and inter-die data movements (DMs). Three quantifiable indicators - ArI, execution cost (Ex-cost), and DM-cost - are employed to precisely evaluate the impacts of these interactions on energy and latency. GPOS adopts a four-step flow with progressive refinement: each of the first three steps focuses on a single indicator at the operator level, while the final step performs context-based calibration to address operator inter-dependencies and avoid offsetting NDP benefits. Narrowing down offloading candidates in step 1 and step 3 significantly accelerates real-time quantitative analysis. Optimized mapping techniques and NDP-IS DF are proposed to reduce Ex-cost and extend operator types supported by NDP. Next, for the first time, sparsity - one of the most popular methods for energy optimization that can alter data reuse or ArI - is quantitatively investigated for its impacts on offloading using GPOS. Our evaluations include representative DNNs, including GPT-2, Bert, RNN, CNN, and MLP. GPOS achieves the minimum energy and latency for each benchmark, with geometric mean speedups of 49.0% and 94.1%, and geometric mean energy savings of 45.8% and 89.2% over A

关键词： Digital storage

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All-dielectric terahertz metasurface for linearly-polarized multichannel transmission and superposition states of spherical and vortex waves

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Photonics Research 2023年第3期11卷 485-493页

作者： FUYU LI YUANXUN LI TINGTING TANG YONGCHENG LU XINYAN LIU YULONG LIAO QIYE WEN State Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of ChinaChengdu 610054China Information Materials and Device Applications Key Laboratory of Sichuan Provincial Universities Chengdu University of Information TechnologyChengdu 610225China

Compared to pure vortex waves,the superposition state of spherical waves and vortex waves has enough degrees of freedom to upgrade applications in particle manipulation,information encryption,and large-capacity ***,we propose a new scheme to achieve superposition states and multichannel transmission of vortex and spherical *** transmissive all-silicon metasurfaces that enable mutual interference between linearly polarized(LP)waves in the terahertz region are *** A can achieve interference between x and y polarized waves,while type B can achieve interference between x(or y)and x(or y)polarized *** multichannel transmission and superposition states of topological charges of+3,+2,and+4 are designed and demonstrated from theoretical,simulative,and experimental perspectives at 1.1 *** addition,the objective fact that the focused superposition state must be observed close to the focal plane is also *** measured results are in good agreement with the theoretical and simulative *** work provides an idea for the design of ultrathin terahertz devices and could be applied in the fields of information encryption and highfrequency communications.

关键词： multichannel polarized superposition

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A Vernier Time-to-Digital Converter with 1.5ps Resolution for an All-Digital Phase Locked Loop in 28nm CMOS 15

A Vernier Time-to-Digital Converter with 1.5ps Resolution fo...

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15th IEEE International Conference on ASIC, ASICON 2023

作者： Wu, Peifang Liu, Yan Feng, Xi Xu, Hao Yan, Na Fudan University State Key Laboratory of Integrated Chip and Systems Shanghai China Beijing Smartchip Semiconductor Technology Co. Ltd Beijing Smartchip Microelectronics Technology Co. Ltd Beijing China

ISBN: (纸本)9798350312980

A vernier delay line based time-to-digital converter(TDC) with high resolution is presented in this paper. Vernier delay line with different delay time is generated by changing the buffer's output capacitance, sense amplifier flip flop (SAFF) is used as arbitrator to quantize the input time interval and decoder converts the thermometer code to binary code. The proposed TDC is implemented in 28nm CMOS. Post simulation results show that it can achieve a resolution about 1.5ps with both the INL and DNL less than one LSB. © 2023 IEEE.

关键词： all-digital PLL (ADPLL) high resolution time-to-digital converter(TDC) Vernier delay line (VDL)

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Analysis and Modeling of Non-ideal Effects in SAR ADC 15

Analysis and Modeling of Non-ideal Effects in SAR ADC

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15th IEEE International Conference on ASIC, ASICON 2023

作者： Zeng, Yaxin Xu, Hao Feng, Xi Yan, Na Fudan University State Key Laboratory of Integrated Chip and Systems Shanghai China Beijing Smartchip Microelectronics Technology Co. Ltd Beijing Smartchip Semiconductor Technology Co. Ltd Beijing China

ISBN: (纸本)9798350312980

For high resolution SAR ADC, the noise and distortion will significantly degrade the performance, thus should be considered carefully during design. This paper presents a behavioral modeling of SAR ADC in Simulink. The model includes the performance limitations such as clock jitter, capacitor mismatch, sampled KT/C noise for switches, noise and offset of comparator and S/H on-resistance distortion. The simulation results of the proposed model provide guidance in choosing the circuit structure and determine spec breakdown of each block in the SAR ADC, which increases the design efficiency with fast design iterations. © 2023 IEEE.

关键词： ADC Behavioral-Modeling SAR Simulink

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An ADPLL Design Model Based on LoRa IoT Application 15

An ADPLL Design Model Based on LoRa IoT Application

引用

15th IEEE International Conference on ASIC, ASICON 2023

作者： Mao, Yiyun Gao, Haoyuan Li, Dejian Xu, Hao Yan, Na Fudan University State Key Laboratory of Integrated Chip and Systems Shanghai China Beijing Smartchip Semiconductor Technology Co. Ltd Beijing Smartchip Microelectronics Technology Co. Ltd Beijing China

ISBN: (纸本)9798350312980

This paper proposes a system design, working on the basis of the Internet of Things (IoT) LoRa protocol, for giving an entire and reliable design guidance for ADPLL circuits and system specifications. The design model consists of a phase-domain model, which gives a verification on phase noise and specification, and a time-domain behavior model, which gives an complete observation during the ADPLL working procedure. Besides the conventional design procedure, which often only uses a phase-domain model, the proposed design model not only offers the system behavior-level operating state, but also obtains the noise and performance results of the loop. In addition, the design model built is completely time-domain-based, so the implementation of the actual digital circuit can be guided by the data flow inside the model. The built system model also covers 400M-510MHz, including the ISM frequency point used by LoRa. © 2023 IEEE.

关键词： ADPLL IoT LoRa technology Model System Design

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integrated photonic millimeter-wave radar based on thin-film lithium niobate

Integrated photonic millimeter-wave radar based on thin-film...

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CLEO: Applications and technology in CLEO 2024, CLEO: A and T 2024 - Part of Conference on Lasers and Electro-Optics

作者： Zhu, Sha Zhang, Yiwen Feng, Jiaxue Wang, Yongji Zhai, Kunpeng Feng, Hanke Pun, Edwin Yue-Bun Zhu, Ning Hua Wang, Cheng College of Microelectronics Faculty of Information Technology Beijing University of Technology Beijing China Department of Electrical Engineering State Key Laboratory of Terahertz and Millimeter Waves City University of HongKong Kowloon Hong Kong Department of Chemistry City University of HongKong Hong Kong State Key Laboratory on Integrated Optoelectronics Institute of Semiconductors Chinese Academy of Sciences Beijing100083 China

We report an integrated photonic radar operating in the mmWave V band (40-50 GHz) based on a 4-inch wafer-scale thin-film lithium niobite (TFLN) technology, achieving multi-target ranging and inverse synthetic apertur... 详细信息

关键词： Radar imaging

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A High Speed, Low Power and Low Phase Noise Divider for Wideband Application 15

A High Speed, Low Power and Low Phase Noise Divider for Wide...

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15th IEEE International Conference on ASIC, ASICON 2023

作者： Lin, Xinyi Xu, Hao Li, Dejian Yan, Na Fudan University State Key Laboratory of Integrated Chip and Systems Shanghai China Beijing Smartchip Microelectronics Technology Co. Ltd Beijing Smartchip Semiconductor Technology Co. Ltd Beijing China

ISBN: (纸本)9798350312980

A low phase noise frequency divider is applied accompany with 2 stages of buffer for wideband application in this paper. With cross coupled inverter in it, this divider could generate quadrature phases and criticize the phase mismatch coming from input signal. Implemented in 28nm CMOS, the clock chain has locking range from 400MHz to 20GHz, and criticizes the phase error from 10° to 1.4°. © 2023 IEEE.

关键词： frequency divider Injection-Locked phase error correction wide locking range

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A Novel Multiple Modes Resonant Sensor Featuring Blue Sideband Excitation 38

A Novel Multiple Modes Resonant Sensor Featuring Blue Sideba...

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38th IEEE International Conference on Micro Electro Mechanical Systems, MEMS 2025

作者： Xu, Jiao Zheng, Zhuoyue Xi, Jingqian Zhang, Ziqian Liu, Huafeng Zhang, Pan Chen, Jianlin Wang, Chen Kraft, Michael Wang, Yuan Martins, R.P. Mak, Pui-In Huazhong University of Science and Technology Moe Key Laboratory of Fundamental Physical Quantities Measurement Pgmf School of Physics Wuhan430074 China University of Macau Institute of Microelectronics State Key Laboratory of Analog and Mixed-Signal Vlsi 999078 China Peking University National Key Laboratory of Advanced Micro and Nano Manufacture Technology School of Integrated Circuits 100871 China Shanghai University School of Microelectronics 200444 China Ku Leuven Department of Electrical Engineering-MNS Leuven3000 Belgium

ISBN: (纸本)9798331508890

This paper reports a novel MEMS resonant structure functioning as a baseline resonant electrostatic force/temperature sensor, highlighting its substantial potential in sensing applications. The resonator, characterized by a dual-cosine structure, is capable of simultaneous multiple resonant modes actuation within the 300 kHz range, through a sole-source drive approach using the recent emerging Blue Sideband Excitation (BSE) technique. This method enables a distinctive multi-modal response, essential for multi-parameter measurements. The research focuses on the sensor's temperature characteristics, electrostatic perturbation sensitivity, and noise floor. Notably, the study reveals intriguing temperature responses across different modes, where certain modes exhibit a significant frequency rise with increasing temperature, this is counter-intuitive with common MEMS resonator devices, prompting further investigation into the underlying mechanisms. The analysis of electrostatic perturbation sensitivity and noise background further unfolds the resonator's performance under various excitation conditions, laying a foundation for advancing sensor functionality, and providing solid evidence on the viability of the subject. To sum up, this study highlights the resonator's potential as a high-precision sensor, opening new opportunities for MEMS sensor design and multi-parameter measurement applications. © 2025 IEEE.

关键词： Microchannels

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IMPLICATIONS OF NOISE IN RESISTIVE MEMORY ON DEEP NEURAL NETWORKS FOR IMAGE CLASSIFICATION

arXiv

引用

arXiv 2024年

作者： Emonds, Yannick Xi, Kai Fröning, Holger Computing Systems Group Institute of Computer Engineering Heidelberg University Germany Key Laboratory of Microelectronics Device & Integrated Technology Institute of Microelectronics Chinese Academy of Sciences China

Resistive memory is a promising alternative to SRAM, but is also an inherently unstable device that requires substantial effort to ensure correct read and write operations. To avoid the associated costs in terms of area, time and energy, the present work is concerned with exploring how much noise in memory operations can be tolerated by image classification tasks based on neural networks. We introduce a special noisy operator that mimics the noise in an exemplary resistive memory unit, explore the resilience of convolutional neural networks on the CIFAR-10 classification task, and discuss a couple of countermeasures to improve this resilience. © 2024, CC BY-SA.

关键词： Image classification

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A Novel Trench IGBT with Built-in Temperature Sensing 3

A Novel Trench IGBT with Built-in Temperature Sensing

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3rd International Symposium on Semiconductor and Electronic technology, ISSET 2024

作者： Zhao, Yishang Li, Zehong Wang, Tongyang Zhou, Ziyi Pi, Meng Zheng, Yige Li, Wei Wan, Li Yang, Yang Qin, Haifeng University of Electronic Science and Technology of China State Key Laboratory of Electronic Thin Films and Integrated Devices Chengdu China Shenzhen Institute for Advanced Study University of Electronic Science and Technology of China Shenzhen China Chongqing Institute of Microelectronics Industry Technology University of Electronic Science and Technology of China Chongqing China China Resources Microelectronics Ltd. Chongqing China

ISBN: (纸本)9798350390285

An innovative trench insulated gate bipolar transistor (IGBT) with temperature sensing is proposed for effective on-line monitoring of the junction temperature. The temperature sensing is consisted by the P doped polysilicon region where the sense and ground terminals are separated on the two sides of it, sensor controlling gate and the oxide isolation part. It is easy fabricated with the conventional trench IGBT. Investigated by the technology computer-aided design (TCAD) tools, the sensing signal keeps a brilliant linear relationship with the maximum junction temperature. And the temperature difference between the sensing part and the hotspot is extremely low due to the built-in sensing structure. It has also been verified that the IGBT featuring novel temperature sensing could detect junction temperature change during the short circuit test. Besides that, as the sensing mode has been well developed, the power dissipation of the proposed temperature sensing structure is optimized. That provides a convenient use in the real power systems, which could be regarded as a superior method to monitor system temperature status. © 2024 IEEE.

关键词： Insulated gate bipolar transistors (IGBT)

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