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2025 International Conference on Electronics, Information, and Communication, ICEIC 2025

作者： Yadav, Vijay Pratap Singh, Vipin Kumar Pokhrel, Tika Ram Mandal, Abir Jyoti Metya, Sanjeev Kumar Majumder, Alak National Institute of Technology Integrated Circuit System Lab Arunachal Pradesh Jote791113 India Vishnu institute of Technology Department of ECE Andra Pradesh Bhimavaram734202 India

ISBN: (纸本)9798331510756

Inrush current is commonly generated when transitioning from an idle to active state, thus causing power noise and voltage drops. This disrupts core stability, leading to potential errors, increased power delivery challenges, and reduced reliability in high-performance processors. This article presents a novel approach to Power Gating (PG) through a soft-start header that enables a gradual activation, allowing a controlled, stepwise increase in current and thereby alleviating the inrush current effect. In this approach, the width (W) of the header sleep transistor is strategically divided into smaller segments, such as W/2, W/5, W/10, or W/20, where each segment of the sleep transistor is activated sequentially, with fixed delay cells introduced between these segments to introduce a deliberate delay in activation. This staggered approach allows only a fraction of the total transistor width to turn on at any given moment, spreading out the current demand over time. The simulation results for UMC65nm CMOS on Cadence Virtuoso with 20% sleep signal demonstrate a notable reduction (54.55%, 82.01 %, 89.94%, and 93.65% in Plan 1 to Plan 4 respectively) in peak inrush current compared to conventional approaches, underscoring the efficacy of soft-start header PG in power-sensitive applications. © 2025 IEEE.

关键词： Sleep research

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GNSS/SINS tight combination navigation technology for multirotor UAV 3

GNSS/SINS tight combination navigation technology for multir...

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2024 3rd International Conference on Aerospace and Control Engineering, ICoACE 2024

作者： Yang, Jianlei Jin, Zhengzhen Zheng, Shuaiyong Jin, Yaohaoran Hu, Na Zhao, Lili Key Laboratory of Satellite Navigation System and Equipment Technology Shijiazhuang050081 China The 54 Research Institute China Electronics Technology Group Shijiazhuang050081 China School of Integrated Circuit Science and Engineering Tianjin University of Technology Tianjin300384 China

Amidst the swift progress in unmanned aerial vehicle (UAV) technology, the enhancement of navigation precision and robustness is paramount for ensuring flight safety and managing the intricacies of various missions. This research presents a sophisticated, tightly integrated Global Navigation Satellite system (GNSS) and Strapdown Inertial Navigation system (SINS) navigation framework designed to synergize the capabilities of both systems, thereby mitigating their respective shortcomings in adverse environments. By utilizing an Extended Kalman Filter for the real-time calibration of inertial sensor errors, this system markedly enhances the navigation accuracy of UAVs. Our rigorous testing, conducted with genuine flight data, revealed that the integrated system surpasses standalone inertial navigation systems, especially in managing position errors, resulting in a 12.5% enhancement in overall navigation accuracy. This study solidifies the technical foundation for UAV applications and advances the development of future navigation systems. © 2025 Institute of Physics Publishing. All rights reserved.

关键词： Unmanned aerial vehicles (UAV)

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ChartInsighter: An Approach for Mitigating Hallucination in Time-series Chart Summary Generation with A Benchmark Dataset

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IEEE Transactions on Visualization and Computer Graphics 2025年 PP卷 PP页

作者： Wang, Fen Wang, Bomiao Shu, Xueli Liu, Zhen Shao, Zekai Liu, Chao Chen, Siming Zhengzhou University Zhengzhou Zhongke Institute of Integrated Circuit and System Application Henan Institute of Advanced Technology China Fudan University Shanghai China Fudan University Zhengzhou Zhongke Institute of Integrated Circuit and System Application School of Computer Science China

Effective chart summary can significantly reduce the time and effort decision makers spend interpreting charts, enabling precise and efficient communication of data insights. Previous studies have faced challenges in generating accurate and semantically rich summaries of time-series data charts. In this paper, we identify summary elements and common hallucination types in the generation of time-series chart summaries, which serve as our guidelines for automatic generation. We introduce ChartInsighter, which automatically generates chart summaries of time-series data, effectively reducing hallucinations in chart summary generation. Specifically, we assign multiple agents to generate the initial chart summary and collaborate iteratively, during which they invoke external data analysis modules to extract insights and compile them into a coherent summary. Additionally, we implement a self-consistency test method to validate and correct our summary. We create a high-quality benchmark of charts and summaries, with hallucination types annotated on a sentence-by-sentence basis, facilitating the evaluation of the effectiveness of reducing hallucinations. Our evaluations using our benchmark show that our method surpasses state-of-the-art models, and that our summary hallucination rate is the lowest, which effectively reduces various hallucinations and improves summary quality. © 1995-2012 IEEE.

关键词： Data visualization

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Design and analysis of GPS satellite-based augmentation system based on low earth orbit constellations 3

Design and analysis of GPS satellite-based augmentation syst...

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2024 3rd International Conference on Aerospace and Control Engineering, ICoACE 2024

作者： Yang, Jianlei Jin, Zhengzhen Zheng, Shuaiyong Huang, Shiyong Ma, Guoyu Ji, Shiran Key Laboratory of Satellite Navigation System and Equipment Technology Shijiazhuang050081 China The 54 Research Institute China Electronics Technology Group Shijiazhuang050081 China School of Integrated Circuit Science and Engineering Tianjin University of Technology Tianjin300384 China College of Software Tianjin Normal University Tianjin300387 China

Addressing the need for improved GPS accuracy, especially for low-dynamic users, this study introduces a GPS augmentation system employing Low Earth Orbit (LEO) satellites. We detail the principles of satellite navigation and augmentation and simulate the GPS-LEO constellation to analyse its performance in terms of satellite visibility and Position Dilution of Precision (PDOP). The results demonstrate substantial augmentation in navigation accuracy with the integrated system, as verified by UAV flight experiments. The integration of LEO satellites is anticipated to advance global navigation capabilities, with implications for intelligent transportation, logistics, and precision agriculture. © 2025 Institute of Physics Publishing. All rights reserved.

关键词： Global positioning system

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ChartInsighter: An Approach for Mitigating Hallucination in Time-series Chart Summary Generation with A Benchmark Dataset

arXiv

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arXiv 2025年

作者： Wang, Fen Wang, Bomiao Shu, Xueli Liu, Zhen Shao, Zekai Liu, Chao Chen, Siming Henan Institute of Advanced Technology Zhengzhou University Zhengzhou Zhongke Institute of Integrated Circuit and System Application China Fudan University China School of Computer Science Fudan University Zhengzhou Zhongke Institute of Integrated Circuit and System Application China

关键词： Semantics

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A High-Performance Hardware Design for Polynomial Multiplication in the CRYSTALS-Kyber Algorithm

A High-Performance Hardware Design for Polynomial Multiplica...

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IEEE Cool Chips

作者： Hsueh Chen Hsiu-Wei Chen Shih-Hsu Huang Po-Yuan Chen Department of Electronic Engineering Chung Yuan Christian University Taoyuan Taiwan System Circuit Testing Technology Department Electronic and Optoelectronic System Research Laboratories Industrial Technology Research Institute Tainan Taiwan

ISBN: (数字)9798331534844

ISBN: (纸本)9798331534851

In the CRYSTALS-Kyber encryption algorithm, polynomial multiplication is one of the most time-consuming tasks, making the optimization of its hardware implementations crucial. In this paper, we propose a hardware architecture for polynomial multiplication in the CRYSTALS-Kyber encryption algorithm, including butterfly units for implementing numbertheoretic transform (NTT), inverse NTT (INTT), and point-wise multiplication (PWM) operations, as well as a conflict-free implementation for constant-geometry memory access on dualport memory. Unlike previous works that focus solely on optimizing NTT and INTT circuits, our approach also optimizes the PWM circuit. Experimental results show that our approach achieves excellent performance in terms of both clock frequency and chip area. Compared to hardware designs that use the same design parameters, our approach can achieve a smaller areatime product.

关键词： Geometry Memory management Memory architecture Transforms Pulse width modulation Hardware Polynomials Encryption Optimization Hardware acceleration

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Soft-Start Header Power Gating for Inrush Alleviated Current Profile

Soft-Start Header Power Gating for Inrush Alleviated Current...

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International Conference on Electronics, Information and Communications (ICEIC)

作者： Vijay Pratap Yadav Vipin Kumar Singh Tika Ram Pokhrel Abir Jyoti Mandal Sanjeev Kumar Metya Alak Majumder Integrated Circuit System Lab National Institute of Technology Jote Arunachal Pradesh India Department of ECE Vishnu institute of Technology Bhimabaram Andra Pradesh India

ISBN: (数字)9798331510756

ISBN: (纸本)9798331510763

关键词： Simulation Noise Power system stability Stability analysis Power system reliability Delays Transistors Integrated circuit reliability Inrush current Switching circuits

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A Valuable and Low-Budget Process Scheme of Equivalized 1 nm technology Node Based on 2D Materials

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Nano-Micro Letters 2025年第8期17卷 294-305页

作者： Yang Shen Zhejia Zhang Zhujun Yao Mengge Jin Jintian Gao Yuhan Zhao Wenzhong Bao Yabin Sun He Tian College of Integrated Circuit Science and Engineering Shanghai Key Laboratory of Multidimensional Information ProcessingEast China Normal UniversityShanghai 200241People’s Republic of China Institute of Microelectronics and Beijing National Research Center for Information Science and Technology(BNRist) Tsinghua UniversityBeijing 100084People’s Republic of China State Key Laboratory of ASIC and System School of MicroelectronicsFudan UniversityShanghai 200433People’s Republic of China Shaoxin Laboratory Shaoxing 312000People’s Republic of China

Emerging two-dimensional(2D)semiconductors are among the most promising materials for ultra-scaled transistors due to their intrinsic atomic-level *** the stacking process advances,the complexity and cost of nanosheet field-effect transistors(NSFETs)and complementary FET(CFET)continue to *** 1 nm technology node is going to be based on Si-CFET process according to international roadmap for devices and systems(IRDS)(2022,https://***/),but not publicly confirmed,indicating that more possibilities still *** miniaturization advantage of 2D semiconductors motivates us to explore their potential for reducing process costs while matching the performance of next-generation nodes in terms of area,power consumption and *** this study,a comprehensive framework is built.A set of MoS2 NSFETs were designed and fabricated to extract the key parameters and *** then for benchmarking,the sizes of 2D-NSFET are scaled to a extent that both of the Si-CFET and 2D-NSFET have the same average device *** these conditions,the frequency of ultra-scaled 2D-NSFET is found to improve by 36%at a fixed power *** work verifies the feasibility of replacing silicon-based CFETs of 1 nm node with 2D-NSFETs and proposes a 2D technology solution for 1 nm nodes,i.e.,“2D eq 1 nm”*** the same time,thanks to the lower characteristic length of 2D semiconductors,the miniaturized 2D-NSFET achieves a 28%frequency increase at a fixed power ***,developing a standard cell library,these devices obtain a similar trend in 16-bit RISC-V *** work quantifies and highlights the advantages of 2D semiconductors in advanced nodes,offering new possibilities for the application of 2D semiconductors in high-speed and low-power integrated circuits.

关键词： Two-dimensional semiconductors 1 nm technology node Nanosheet field-effect transistors Complementary field-effect transistors Horizontal scaling

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Inertia Transmission Control of Full-Power Converter Variable-Speed Pumped Storage system for Grid Frequency Support

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IEEE Transactions on Sustainable Energy 2025年

作者： Chuang, Kaihsun Tao, Xiongfei Luan, Yihang Peng, Minxuan Sun, Jianjun Zha, Xiaoming Wuhan University Hubei Key Laboratory of Power Equipment and System Security for Integrated Energy The School of Electrical Engineering and Automation Wuhan430072 China Huazhong University of Science and Technology School of Integrated Circuit Wuhan430074 China

Full-power converter variable-speed pumped storage (FPC-VSPS) is a promising technique for flexible power regulation in small-scale distributed hydroelectric power plants. However, conventional vector control limits the synchronous motor of the FPC-VSPS from providing inertia support to the power grid. To overcome this limitation, this paper introduces an inertia transmission control for FPC-VSPS based on the concept of DC voltage synchronization. Firstly, the control incorporates the DC capacitor power equation into the GSC control. To enable inertia transmission from the FPC-VSPS synchronous machine, the DC capacitor dynamics are fed into both the speed and torque control of the MSC. Secondly, a torsion spring-rigid body equivalent model is introduced based on the inertia transmission process, analyzing the effects of physical parameters, control coefficients, and transmission delays on the inertia transmission performance. Theoretical analysis and simulation results reveal that the inherent physical differences and transmission delay have a negative impact on the effectiveness of the inertia transmission. Consequently, a DC capacitor design method based on inertia matching is proposed, accounting for the constraints of physical inertia matching, system stability, and operational security. Finally, simulations and experiments prove the necessity of inertia matching and verify the effectiveness of the proposed control to cope with frequency fluctuations in both pumping and generating modes. © 2010-2012 IEEE.

关键词： Vector control (Electric machinery)

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EEVS: Redeploying Discarded Smartphones for Economic and Ecological Drug Molecules Virtual Screening

IEEE Transactions on Sustainable Computing

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IEEE Transactions on Sustainable Computing 2025年

作者： Ling, Ming Zhang, Chuanzhao Tang, Shidi Chen, Ruiqi Zhu, Yanxiang Southeast University National ASIC System Engineering Technology Research Center Nanjing210096 China Brussels1050 Belgium Nanjing Renmian Integrated Circuit Company Ltd. VeriMake Innovation Laboratory Nanjing210088 China

Virtual screening plays an indispensable role in the early stages of drug discovery, which utilizes high-throughput molecular docking to find potential drug candidates from vast databases. Virtual screening necessitates considerable computational resources to analyze tremendous compounds. However, the substantial demand for computational resources and the challenges in accessing high performance hardware hinders the development of drug discovery. This work introduces EEVS (Economic and Ecological Virtual Screening), an innovative framework that utilizes the computational capabilities of discarded smartphones for cost-effective and eco-friendly virtual screening. EEVS, with 16 discarded smartphones in this study, greatly reduces the construction cost of virtual screening, which is only 38.7%, 11.9%, and 26.9% of those of CPU, GPU, and FPGA implementations, respectively. Moreover, EEVS achieves a 4.05 × improvement in screening speed while maintaining similar power and docking accuracy with CPU. When compared with GPU and FPGA, EEVS attains advantages of 4.93 × in screening power and 1.08 × in screening speed, respectively. Furthermore, we proposed the PCSA algorithm to further accelerate the screening speed of EEVS by a maximum of 33.6% while balancing various thermal dissipation requirements. To the best of our knowledge, this work is the first virtual screening framework that leverages discarded smartphones to accelerate drug discovery. © 2016 IEEE.

关键词： Virtual environments

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