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37th IEEE International system-on-Chip Conference, SOCC 2024

作者： Kaden, Janik Markert, Erik Heinkel, Ulrich Chemnitz University of Technology Chair for Circuit and System Design Chemnitz Germany

ISBN: (纸本)9798350377569

In recent years, ultra-wideband (UWB) has emerged as a preferred choice for precise wireless indoor localization and navigation systems. The inherently better ranging performance and stronger resistance to multipath fading compared to previously used technologies have led to increased research on the performance of UWB devices. However, regulatory requirements on transmission power constrain UWB communication range. This paper studies the impact of different PHY settings of an 802.15.4z-compliant SiP, the Qorvo DWM3000, in a comprehensive set of real-world measurements. Furthermore, we focus on range maximization and high reliability when power consumption or air utilization is not constricted. Results show that with a commercial off-the-shelf UWB SiP, a maximal reliable range of 125 meters with an overall mean accuracy of 25.1 cm can be achieved while staying within the regulatory limits. © 2024 IEEE.

关键词： Ultra-wideband (UWB)

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Penalty-Free 400Gb/s 4λ WDM Transmission in NANF with Linear FFE Only Reaching 42dB Optical Budget for Mobile X-Haul

Penalty-Free 400Gb/s 4λ WDM Transmission in NANF with Linea...

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2024 Asia Communications and Photonics Conference, ACP 2024 and International Conference on Information Photonics and Optical Communications, IPOC 2024

作者： Li, Chao Liu, Xumeng Sun, Peng Wang, Qibing Chen, Juan Wang, Lei Gao, Shoufei Wang, Yingying Ding, Wei Liu, Zichen He, Zhixue Yu, Shaohua Department of Circuit and System Pengcheng Laboratory Shenzhen China Institute of Photonics Technology Jinan University Guangzhou China

Supported by self-developed high-performance 1.4km NANF and linear equalizer, we achieved the penalty-free 400Gb/s 4λ WDM transmission for mobile X-Haul, reaching optical budget of 42.4dB and dynamic range and net da... 详细信息

ISBN: (纸本)9798350379266

关键词： Budget control

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Optoelectronic Frequency Synthesizer With World-Record Phase Noise

Optoelectronic Frequency Synthesizer With World-Record Phase...

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2023 Optical Fiber Communications Conference and Exhibition, OFC 2023

作者： Bahmanian, Meysam Fard, Saeed Scheytt, Christoph Paderborn University System and Circuit Technology Group Heinz Nixdorf Institute Paderborn Germany

ISBN: (纸本)9781957171180

In this demo we show an ultra-low phase noise optoelectronic PLL (OEPLL) based on optical clock source. The output signal of this type of PLL is in the electrical domain and its reference oscillator, typically a mode-locked laser, operates in the optical domain. The OEPLL has a frequency range of 2-20 GHz. The OEPLL has an in-band phase noise of below -150 dBc/Hz at 100-kHz offset frequency for a carrier frequency of 10 GHz. This phase noise level is 10-20 dB better than state-of-the-art commercial frequency synthesizers. © 2023 The Author(s).

关键词： Phase locked loops

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Soft-Start Header Power Gating for Inrush Alleviated Current Profile

Soft-Start Header Power Gating for Inrush Alleviated Current...

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2025 International Conference on Electronics, Information, and Communication, ICEIC 2025

作者： Yadav, Vijay Pratap Singh, Vipin Kumar Pokhrel, Tika Ram Mandal, Abir Jyoti Metya, Sanjeev Kumar Majumder, Alak National Institute of Technology Integrated Circuit System Lab Arunachal Pradesh Jote791113 India Vishnu institute of Technology Department of ECE Andra Pradesh Bhimavaram734202 India

ISBN: (纸本)9798331510756

Inrush current is commonly generated when transitioning from an idle to active state, thus causing power noise and voltage drops. This disrupts core stability, leading to potential errors, increased power delivery challenges, and reduced reliability in high-performance processors. This article presents a novel approach to Power Gating (PG) through a soft-start header that enables a gradual activation, allowing a controlled, stepwise increase in current and thereby alleviating the inrush current effect. In this approach, the width (W) of the header sleep transistor is strategically divided into smaller segments, such as W/2, W/5, W/10, or W/20, where each segment of the sleep transistor is activated sequentially, with fixed delay cells introduced between these segments to introduce a deliberate delay in activation. This staggered approach allows only a fraction of the total transistor width to turn on at any given moment, spreading out the current demand over time. The simulation results for UMC65nm CMOS on Cadence Virtuoso with 20% sleep signal demonstrate a notable reduction (54.55%, 82.01 %, 89.94%, and 93.65% in Plan 1 to Plan 4 respectively) in peak inrush current compared to conventional approaches, underscoring the efficacy of soft-start header PG in power-sensitive applications. © 2025 IEEE.

关键词： Sleep research

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Tunnel silicon nitride manipulated reconfigurable bi-mode nociceptor analog

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Photonics Research 2024年第8期12卷 1820-1827页

作者： CHENGDONG YANG YILONG LIU LINLIN SU XINWEI LI LIHUA XU QIMEI CHENG Jiangsu Province Engineering Research Center of Integrated Circuit Reliability Technology and Testing System Wuxi UniversityWuxi 214105China

Neuromorphic applications have shown great promise not only for efficient parallel computing mode to hold certain computational tasks,such as perception and recognition,but also as key biomimetic elements for th intelligent sensory system of next-generation ***,achieving such a biomimetic nociceptor tha can adaptively switch operation mode with a stimulation threshold remains a *** rational design of material properties and device structures,we realized an easily-fabricated,low-energy,and reconfigurable no *** is capable of threshold-triggered adaptive bi-mode jump that resembles the biological alarm system With a tunnel silicon nitride(Si_(3)N_(4))we mimicked the intensity-and rehearsal-triggered jump by means of th tunneling mode transition of Si_(3)N_(4)*** threshold signals the device can also express some common synaptic functions with an extremely low energy density of 33.5 f J∕μm^(2).In addition,through the modulation o Si_(3)N_(4)thickness it is relatively easy to fabricate the device with differing pain *** nociceptor analog based on a tunneling layer provides an opportunity for the analog pain alarm system and opens up a new path toward threshold-related novel applications.

关键词： Tunnel tunneling rational

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Application and Implementation of Convolutional Neural Network Accelerator Based on FPGA in Environmental Sound Classification 8

Application and Implementation of Convolutional Neural Netwo...

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8th International Conference on Computer and Communication systems, ICCCS 2023

作者： Zhang, Jianwei Yan, Haonan School of Biomedical Engineering School of Artificial Intelligence Dalian University of Technology Liaoning Key Lab of Integrated Circuit and Biomedical Electronic System Dalian China School of Biomedical Engineering Liaoning Key Lab of Integrated Circuit and Biomedical Electronic System Dalian University of Technology Dalian China

ISBN: (纸本)9781665456128

With the development of artificial intelligence, convolutional neural network (CNN) has achieved great success in various learning tasks, and has been applied to environmental sound classification tasks, achieving a high classification accuracy. With the development of convolutional neural network in the application of environmental sound classification, the design of hardware accelerator for convolutional neural network has become a hot topic. Compared with CPU, GPU and ASIC, FPGA has the unique advantages of low power consumption and high energy efficiency in accelerating deep learning, and has become the preferred hardware platform for neural network hardware implementation. In this paper, a convolution neural network accelerator based on FPGA is proposed, which can realize convolution, tanh nonlinear activation, average pooling and other operations. The hardware accelerator can realize the inference process of environmental sound classification, and achieve high energy efficiency and low resource consumption while having a high classification accuracy. The network was tested on Xilinx Virtex VC-707 FPGA board. The experimental results show that its energy efficiency is 547.60 and 377.36 times higher than that of CPU and GPU respectively. © 2023 IEEE.

关键词： Field programmable gate arrays (FPGA)

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A 4.2-to-5.6 GHz Transformer-Based PMOS-only Stacked-gm VCO in 28-nm CMOS

A 4.2-to-5.6 GHz Transformer-Based PMOS-only Stacked-gm VCO ...

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2022 IEEE International Conference on Integrated circuits, Technologies and Applications, ICTA 2022

作者： Zhang, Mingkang Zhu, Zihao Liu, Yueduo Zhang, Zehao Bao, Rongxin Lin, Jiahui Zhuang, Haovu Liu, Jiaxin Zhou, Xiong Yang, Shiheng Li, Qiang Institute of Integrated Circuit and System University of Electronic Science and Technology of China China

ISBN: (数字)9781665492690

ISBN: (纸本)9781665492690

This paper presents a low power, low phase noise, and small chip area transformer-based PMOS-only stacked-g», LC VCO in a 28-nm process. Both the top and bottom use PMOS cross-coupled pairs to provide negative resistances with suppressing the flicker noise. An interleaved transformer is used to get a higher coupling coefficient to achieve small chip area and high passive voltage gain. The VCO exhibits a wide turning range from 4.2 to 5.6 GHz, and low phase noise from -120 dBc/Hz to -113 dBc/Hz at 1MHz frequency offset, respectively. It consumes minimum 678 μ W and maximum 680 μ W from a 0.8V supply voltage which does not require internal LDO or DC-DC converter to reduce the supply voltage. © 2022 IEEE.

关键词： Variable frequency oscillators

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Modifying the Power and Performance of 2-Dimensional MoS_(2)Field Effect Transistors

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Research 2023年第3期2023卷 741-756页

作者： Fulin Zhuo Jie Wu Binhong Li Moyang Li Chee Leong Tan Zhongzhong Luo Huabin Sun Yong Xu Zhihao Yu College of Integrated Circuit Science and Engineering Nanjing University of Posts and TelecommunicationsNanjing 210023China Guangdong Greater Bay Area Institute of Integrated Circuit and System Guangzhou 510535China Institute of Microelectronics Chinese Academy of SciencesBeijing 100029China College of Electronic and Optical Engineering and College of Flexible Electronics(Future Technology) Nanjing University of Posts and TelecommunicationsNanjing 210023China

Over the past 60 years,the semiconductor industry has been the core driver for the development of information technology,contributing to the birth of integrated circuits,Internet,artificial intelligence,and Internet of *** technology has been evolving in structure and material with co-optimization of performance–power–area–cost until the state-of-the-art sub-5-nm ***-dimensional(2D)semiconductors are recognized by the industry and academia as a hopeful solution to break through the quantum confinement for the future technology *** the recent 10 years,the key issues on 2D semiconductors regarding material,processing,and integration have been overcome in sequence,making 2D semiconductors already on the verge of *** this paper,the evolution of transistors is reviewed by outlining the potential of 2D semiconductors as a technological option beyond the scaled metal oxide semiconductor field-effect *** mainly focus on the optimization strategies of mobility(μ),equivalent oxide thickness(EOT),and contact resistance(RC),which enables high ON current(Ion)with reduced driving voltage(Vdd).Finally,we prospect the semiconductor technology roadmap by summarizing the technological development of 2D semiconductors over the past decade.

关键词： overcome driving enable

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Gray and White Matters Segmentation in Brain CT Images Using Multi-task Learning from Paired CT and MR Images

Gray and White Matters Segmentation in Brain CT Images Using...

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International Workshop on New Approaches for Multidimensional Signal Processing, NAMSP 2023

作者： Han, Taohai Wang, Hongkai School of Biomedical Engineering Faculty of Medicine Dalian University of Technology Liaoning Dalian China Liaoning Key Laboratory of Integrated Circuit and Biomedical Electronic System Dalian University of Technology Liaoning Dalian China

ISBN: (纸本)9789819727438

Computer tomography (CT) has been routinely used for decades in clinical neuroimaging. Compared to Magnetic resonance imaging (MR), CT is more readily available and more cost-effective, but the soft-tissue contrast is much lower. In brain CT images, the unclear soft-tissue boundaries and the high noise level hamper accurate segmentation of the gray and white matter, leaving obstacles for the subsequent geometrical quantification of brain structures. To address this challenge, this paper specifically acquires same-patient CT and MR image pairs and proposes a multi-task learning model for simultaneous tissue segmentation and modality transfer. We aim to use the modality transfer task to learn corresponding MR and CT features which assists the segmentation task to achieve more accurate results than single modality learning. Moreover, we add a Shannon entropy loss function to the training loss to further combat the high noise influence and reduce the fragmentation problem of the segmentation results. Experimental results proved that our multi-task framework achieves more accurate segmentation than the single segmentation task, and the Shannon entropy loss results in much fewer broken brain regions than the state-of-the-art (SOTA) U-net method. Our study provides a useful tool for clinical neural CT image analysis. © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024.

关键词： Brain

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Facial Photo-Guided Head Anatomy Modeling Based on Deep Learning and 2D/3D Shape Prior Model Registration 2nd

Facial Photo-Guided Head Anatomy Modeling Based on Deep Lear...

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2nd World Conference on Intelligent and 3D Technologies, WCI3DT 2023

作者： Wang, Meng Wang, Hongkai Faculty of Medicine School of Biomedical Engineering Dalian University of Technology Dalian116024 China Liaoning Key Laboratory of Integrated Circuit and Biomedical Electronic System Dalian University of Technology Dalian116024 China

ISBN: (纸本)9789819970100

Three-dimensional (3D) models of individualized head anatomy are often used in the preoperative planning of plastic surgery. Most current methods use Computed Tomography (CT) to acquire the head anatomy, but CT scan exposes the patients to X-ray radiation. Alternatively, artificial intelligence-based estimation of 3D head anatomy from the facial photo is a safer and more efficient choice, especially for scenarios that do not require high modeling accuracy of internal structures (e.g., doctor–patient communication and surgery procedure demonstration). We develop a method for constructing a personalized 3D model of complete head anatomy (including skin and internal structures) from the front and side view photos. We first detect key facial landmarks from the photos with a convolution neural network (CNN), then perform 2D/3D registration to morph a statistical shape model (SSM) of complete head anatomy to match the dual-view photos. Our method uses deep learning to achieve accurate facial landmark detection and employ the anatomy shape prior to yielding reasonable internal structure estimation. We evaluated the method based on 12 subjects (including 7 males and 5 females). The facial surface reconstruction error was assessed using the 3D surface scan of the subjects as the ground truth. Our method’s root mean square error (RMSE) was 3.60 ± 0.49 mm, which was 1.06 ± 0.39 mm lower than the state-of-the-art (SOTA) CNN-based face reconstruction method. Our method also predicts all the internal head structures (bones, muscles, vessels, nerve fibers, fat, glands, and brain structures), which are not provided by the SOTA method. To the best of our knowledge, this is the first study modeling complete head anatomy from facial photos toward clinical applications. © 2024, The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

关键词： Surgery

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