To address the deficiencies of existing point cloud classification and segmentation methods in processing local features and contextual information, this research proposes a novel network architecture—the COGCN model...
详细信息
This article describes an approach to embed technology independent, synthesizable FPGA-like cores into ASIC designs. The motivation for this concept is to combine the best aspects of the two chip design domains ASIC a...
详细信息
ISBN:
(纸本)9783866445154
This article describes an approach to embed technology independent, synthesizable FPGA-like cores into ASIC designs. The motivation for this concept is to combine the best aspects of the two chip design domains ASIC and FPGA. ASICs have better timing performance, are cheaper in mass production and less power consumptive. FPGAs have the big advantage to be reconfigurable. With FPGA-like cores being embedded into ASICs this extraordinary FPGA feature is transferred to the ASIC domain. The main innovative aspect of the approach proposed in this paper is not the concept of combining ASIC and FPGA on one die. This has already been done before. The novelty is to find ways to use standard components and cells for the FPGA part to be able to enhance ASIC designs without being restricted by technological and vendor related barriers. Among many other applications reconfigurability can be leveraged to improve verification problems, which arise with today's 100 million gate designs. Dedicated, synthesized PSL [23] monitors, which are loaded in embedded FPGA cores, accelerate the process of narrowing error locations on the chip.
This paper presents an improved calorimetric MEMS flow sensor to meet the needs of large-scale industrial applications such as semiconductor and photovoltaics. Reliability and universality are considered the most crit...
详细信息
In this paper we present an application example for a run-time reconfigurable embedded system. The system design is based on the perceptions of previous works from several groups. We comment on the theoretical backgro...
详细信息
In this paper we discuss the usability of dynamic hardware reconfiguration for the simulation of neural networks. A dynamically reconfigurable hardware accelerator for self-organizing feature maps is presented. The sy...
详细信息
In this paper we present a test lab for the reliability evaluation of power distribution units. The presence of a dependable power distribution network is a fundamental prerequisite in the context of datacenter reliab...
详细信息
This paper presents an approach to the problem of localization in wireless sensor networks. For many applications, it is essential to know the absolute position of the network nodes. Due to the large number of nodes, ...
详细信息
In the emerging field of single-chip multiprocessors (CMP) analytical models of performance and power consumption are necessary for design space exploration and the analysis of existing architectures. In the light of ...
详细信息
暂无评论