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IEEE International Workshop on Cellular Nanoscale Networks and their Applications, (CNNA)

作者： J. Poikonen A. Paasio Department of Information Technology Laboratory of Electronics and Communication Systems University of Turku Finland Deportment of Electrical and Communication Engineering Electronic Circuit Design Laboratory Helsinki University of Technology Finland

Mathematical morphology provides tools for many image processing tasks. In this paper we discuss the implementation of grayscale morphological operators of erosion, dilation and reconstruction with a hardware efficient ranked order filter circuit. By using dedicated hardware for these basic operations a higher performance of processing more complex functions in a massively parallel processor array can be achieved. Because the circuit realization of the ranked order filter used is very compact, the area required for one processing cell can be kept low. Simulations of the operation were performed with a 0.18 /spl mu/m digital CMOS technology.

关键词： Gray-scale Circuits Morphology Image reconstruction Filters Image processing Hardware Cellular neural networks Morphological operations Data mining

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New genetic algorithm approach for dynamic biochemical sensor measurements characterization

New genetic algorithm approach for dynamic biochemical senso...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： D. Gantla H.S. Abdel-Aty-Zohdy R.L. Ewing Microelectronics System Design Laboratory Department of Electrical & Systems Engineering Oakland University Rochester MI USA Wright Patterson Air Force Base OH USA

In an olfaction system (E-Nose) hardware implementation, outputs from the GA approach are used as inputs to an intelligent neural network system for biochemical detection and decision-making. In this paper we present a Genetic Algorithm for measurement characterization with dynamic inputs. Input measurements are from a given range and are assumed in parallel from chemical-sensor array. An input multiplexer/controller/Analog-Digital converter preprocessing stage is used to control these input measurements. The new dynamical approach presents measurement characterization and also optimum fused measurements without loosing the integrity of incoming signals. Through a novel mutation and crossover approach (Half Sibling and A Clone) optimum characteristic weight chromosomes are achieved. HSAC represents both crossover and mutation. A key feature of the new approach is that no pre-assigned minimum error is specified, rather error is dynamically evaluated based on measurements. Simulation results of the new GA with dynamic measurements are compared with one of the approaches from GAlib (A library of genetic Algorithm approaches from MIT) and proved the new approach has minimum error and a early convergence. MATLAB has been used as the simulation tool.

关键词： Genetic algorithms Biosensors Genetic mutations Neural network hardware Intelligent systems Intelligent networks Intelligent sensors Neural networks Decision making Chemicals

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An efficient approach of the SOM algorithm to the traveling salesman problem

An efficient approach of the SOM algorithm to the traveling ...

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Brazilian Symposium on Neural Networks

作者： F. Vieira A. Neto J. Costa Computer Engineering and Automation Department Technological Center Intelligent Systems Laboratory Federal University of Rio Grande do Norte Natal Rio Grande do Norte Brazil Electrical Engineering Department Intelligent Systems Laboratory Federal University of Rio Grande do Norte Natal Rio Grande do Norte Brazil

This paper presents an approach to the well-known traveling salesman problem (TSP) via competitive neural networks. The neural network model adopted in this work is the Kohonen network or self-organizing maps (SOM), which has important topological information about its neurons configuration. This paper is concerned with the initialization aspects, parameters adaptation, and the complexity analysis of the proposed algorithm. The modified SOM algorithm proposed in this paper has shown better results when compared with others neural network based approaches to the TSP.

关键词： Traveling salesman problems Neurons Neural networks Cities and towns Convergence Joining processes automation Intelligent systems Self organizing feature maps Algorithm design and analysis

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Piecewise-linear modeling of analog circuits based on model extraction from trained neural networks

Piecewise-linear modeling of analog circuits based on model ...

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IEEE International Workshop on Behavioral Modeling and Simulation (BMAS)

作者： G. Gothoskar A. Doboli S. Doboli VLSI Systems Design Laboratory Electrical and Computer Engineering Department State University of New York Stony Brook Stony Brook NY USA Department of Computer Science Hofstra University Hempstead NY USA

This paper presents a new technique for automatically creating analog circuit models. The method extracts piecewise linear models from trained neural networks. A model is a set of linear dependencies between circuit performance and design parameters. The paper illustrates the technique for an OTA circuit for which models for gain and bandwidth are generated. As experiments show, the obtained models have simple form that accurately fits the sampled points. These models are useful for fast simulation of systems with nonlinear behavior and performance.

关键词： Piecewise linear techniques Analog circuits Neural networks Circuit synthesis Laboratories Predictive models Very large scale integration Analog computers Computer networks design engineering

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A hierarchical genetic algorithm for the design of beta basis function neural network

A hierarchical genetic algorithm for the design of beta basi...

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International Joint Conference on Neural Networks (IJCNN)

作者： C. Aouiti A.M. Alimi F. Karray A. Maalej Faculty of Sciences of Bizerta Universite de Carthage Tunisia Department of Electrical Engineering REGIM: Research Group on Intelligent Machines University of Sfax Sfax Tunisia Systems design Engineering Department Pattern Analysis and Machine Intelligence Laboratory University of Waterloo Waterloo ONT Canada Department of Mechanical Engineering University of Sfax ENIS Sfax Tunisia

We propose an evolutionary neural network-training algorithm for beta basis function neural networks (BBFNN). Classic training algorithms for neural networks start with a predetermined network structure. Generally the network resulting from learning applied to a predetermined architecture is either insufficient or over-complicated. This paper describes a hierarchical genetic learning model of the BBFNN. In order to examine the performance of the proposed algorithm, they were used for the approximation problems. The results obtained are very satisfactory with respect to the relative error.

关键词： Genetic algorithms Algorithm design and analysis Neural networks Artificial neural networks Biological cells Neurons Chaos Machine intelligence Laboratories Convergence

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Considering the alternatives in low-power design

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IEEE Circuits and Devices Magazine 2001年第4期17卷 23-29页

作者： Stouraitis, T. Paliouras, V. Department of Electrical and Computer Engineering University of Patras Greece IEEE Circuits and Systems Society Technical Committee on VLSI Systems and Applications Digital Signal Processing and the Multimedia Systems Committees United States VLSI Design Laboratory ECE Dept. University of Patras Greece Computer Engineering and Informatics Department University of Patras Greece ACM SIAM Technical Chamber of Greece Greece

Recent advances in computer arithmetic offer interesting alternative solutions for low-power design. Depending on an assortment of factors that need to be considered, it is worth evaluating the logarithmic number system (LNS) or the residue number system (RNS) for hardware implementations of computationally intensive tasks. As such, the choice of arithmetic can lead to substantial power savings.

关键词： Integrated circuit layout

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Formal verification and performance evaluation of logic integrated systems based on hierarchical analysis

Formal verification and performance evaluation of logic inte...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： F.A. El-Licy H.S. Abdel-Aty-Zohdy Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

ISBN: (纸本)078037150X

Formal verification of very large scale integrated circuit (VLSIC) involves the formal correctness of the functionality of a given design, while circuit validation involves the reliability and efficiency of the design. A hierarchical approach for computation, of IC design efficiency is proposed and implemented using figures of merit. The work has been motivated to partially complete an IC formal verification tool. The implemented system is integrated into a formal verification environment to reflect the performance of the verified system. The system is capable of analyzing the power dissipation and figures of merit using equivalent R and C components. The hierarchical analysis and evaluation of figures of merit general factors obtained at different system levels represent performance evaluation of each gate. An illustrative example of a 6/spl times/6 carry look-ahead adder is given and worst case conditions have been determined. The system performance may thus be improved.

关键词： Formal verification CMOS logic circuits Binary trees Power dissipation Semiconductor device modeling Laboratories Performance analysis Switches Delay effects Logic design

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A high-speed multi-port data buffer design for low-energy DSP applications

A high-speed multi-port data buffer design for low-energy DS...

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Annual IEEE International ASIC/SOC Conference

作者： Sangjin Hong Shu-Shin Chin Fanshi Zhao Mobile Systems Design Laboratory Mobile Systems Design Laboratory Department of Electrical and Computer Engineering State University of New York Stony Brook Stony Brook NY USA

ISBN: (纸本)0780367413

Area and power of data storage elements can be excessively large in many data intensive DSP ASICs, such as high-throughput pipelined-FFTs and data interleavers. In this paper, we present a low-complexity multi-port data buffer design methodology based on dynamic memory configuration that results in small area and low power overhead by adapting the buffer architecture to the data access requirements. The buffer minimizes the number of transistors and simplifies-the interface between memory core and external digital circuitry. The buffer can be designed with a low cost digital circuit processing technology. To evaluate our methodology, we designed a buffer for data interleaver and pipelined FFT that requires high throughput. We compare the buffer with conventional buffers based on static memory.

关键词： Computer buffers Digital signal processing Application specific integrated circuits Digital circuits design methodology Digital signal processing chips Random access memory Application software Flexible printed circuits Throughput

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Robust PI and PID controllers including Smith predictor structure

Robust PI and PID controllers including Smith predictor stru...

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American Control Conference (ACC)

作者： B. Kristiansson B. Lennartson Department of Electrical and Computer Engineering Chalmers Lindholmen Goteborg Sweden Department of Signals and Systems Control and Automation Laboratory Chalmers University of Technology Goteborg Sweden

In this paper PI and PID controllers augmented by a Smith predictor structure are compared to ordinary PI and PID controllers, for plants with medium and great time delays. The comparison is based an a systematic evaluation method, where both robustness and performance aspects in different frequency regions are taken into account. The results show that a Smith predictor increases performance somewhat for a PID controller when the time delay is moderate. For great time delays, however, the improvement is insignificant. An important remark is that it is necessary to include the predictor structure in the design to get acceptable robustness properties. For a PI controller the benefits from a predictor are mostly small or negligible independent of time delay. Most important is, however that a derivative part obviously will bring significantly greater improvement than a Smith predictor to a system with a PI controller. This result is somewhat surprising, since Smith predictors are normally used together with PI and not with PID controllers. Furthermore, it is sometimes argued that it is no use to include derivative action for plants with significant time delay.

关键词： Robust control Three-term control Control systems Delay effects Automatic control Frequency Robustness Robust stability automation Pi control

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design approach for biomedical smart sensors

Design approach for biomedical smart sensors

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： R.L. Ewing H.S. Abdel-Aty-Zohdy Air Force Research Laboratory Inforamation Directorate Adjunct Professor Department of Electrical and Computer Engineering Air Force Institute of Technology USA Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

ISBN: (纸本)078037150X

System-on-Chip solid state circuits that sense, receive, transmit, and process signals are the sensors, or eyes and ears, of the medical field of the millennium. The goal and design of the System-on-Chip (SOC) program for industry will be to provide affordable, reproducible, and reliable front-end instrumentation, components and subsystems for medical systems. To process/store/analyze the signals acquired from these medical sensors, analog/digital systems are used to provide data fusion and information extraction. These biomedical smart sensors cover the hybrid domains of mixed-technology (electrical, mechanical, optical, thermal, biochemical) and mixed-concept (electrical, control, digital signal processing). These significant domain design differences impose robust design challenges for medical sensor technology.

关键词： Intelligent sensors Biosensors System-on-a-chip Signal processing Sensor systems Mechanical sensors Solid state circuits Eyes Ear Instruments

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