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IEEE International Conference on Industrial Informatics (INDIN)

作者： B. Vogel-Heuser S. Feldmann J. Folmer J. Ladiges A. Fay S. Lity M. Tichy M. Kowal I. Schaefer C. Haubeck W. Lamersdorf T. Kehrer S. Getir M. Ulbrich V. Klebanov B. Beckert Institute of Automation and Information Systems Technische Universität München Germany Institute of Software Engineering and Automotive Informatics University of Braunschweig Germany Automation Technology Institute Helmut Schmidt University Germany Distributed Systems and Information Systems Universität Hamburg Germany Institute for Programming and Reactive Systems Technische Universität Braunschweig Germany Software Engineering Group University of Siegen Germany Software Engineering Division University of Gothenburg Chalmers Sweden Reliable Software Systems University of Stuttgart Germany Application-oriented Formal Verification Karlsruhe Institute of Technology Germany

Automated machines and plants are operated for some decades and undergo an everlasting evolution during this time. In this paper, we present three related open evolution challenges focusing on software evolution in the domain of automated production systems, i.e. evolution and co-evolution of (interdisciplinary) engineering models and code, quality assurance as well as variant and version management during evolution.

关键词： Software Unified modeling language Automation Hardware Adaptation models Solid modeling Testing

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On Ordinary and Standard Products of Infinite Family of σ-finite Measures and Some of Their Applications

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Acta Mathematica Sinica,English Series 2011年第3期27卷 477-496页

作者： Gogi Rauli PANTSULAIA Department of Mathematics Georgian Technical University Faculty of Informatics and Control Systems B. P. 0175 Kostava Street-77 Tbilisi Georgia I. Vekua Institute of Applied Mathematics Tbilisi State University Division of Applied Logic and Programming B. P. 0143 University St. 2 Tbilisi Georgia

We introduce notions of ordinary and standard products of a-finite measures and prove their existence. This approach allows us to construct invariant extensions of ordinary and standard products of Haar measures. In particular, we construct translation-invariant extensions of ordinary and standard Lebesgue measures on R∞ and Rogers-Fremlin measures on l∞, respectively, such that topological weights of quasi-metric spaces associated with these measures are maximal （i.e., 2c）. We also solve some Fremlin problems concerned with an existence of uniform measures in Banach spaces.

关键词： Ordinary and standard products of a-finite measures invariant extensions Rogers-Fremlin measures on l∞

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A Human Capital Strategy for Ship Design Acquisition Workforce Improvement: The US Navy's Center for Innovation in Ship Design

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NAVAL ENGINEERS JOURNAL 2009年第4期121卷 45-67页

作者： Keane, Robert G., Jr. Fireman, Howard Hough, Jeffrey J. Cooper, Kelly Naval Sea Systems Command (NAVSEA) Deputy Director for Programming (N80B) US Navy's Center for Innovation in Ship Design (CISD) located at the Naval Surface Warfare Center Carderock (NSWC-CD) Office of Naval Research Sea Warfare and Weapons Department Sea Platforms and Weapons Division

Early in the dark days of World War II, President Roosevelt asked the Navy how it would provide the thousands of ships necessary for the numerous amphibious assault landings that were being planned. At a subsequent high-level meeting, where John Neidermair, the Technical Director of the Preliminary Design division at BUSHIPS (Bureau of Ships-a predecessor organization to the Naval Sea systems Command-NAVSEA), created a concept design sketch of the now famous LSTs. It was this same BUSHIPS Ship Design organization that designed the US Navy Fleet which defeated the Japanese and German navies. And it was the BUSHIPS successor organization, NAVSEA, which designed the 600-ship Fleet during the President Reagan build-up of the 1980s and early 1990s. This early stage ship design capability to translate the operators' needs into technically feasible ship concepts and designs is still a core responsibility of NAVSEA. However, NAVSEA is now undertaking the grand challenge of rebuilding the Navy's ship design capabilities which were dramatically downsized during the 1990s. The Human Capital Strategy for Ship Design Acquisition Workforce Improvement is a proven road map for reconstituting the Navy's ship design capabilities and reinvigorating the naval ship design community. The Office of Naval Research (ONR) and NAVSEA made significant progress in this direction by establishing the Navy's Center for Innovation in Ship Design (CISD). CISD is accelerating the career development of ship design leaders, and is paving the way for fully implementing a Human Capital Strategy for Ship Design Acquisition Workforce Improvement.

关键词： Military operations

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Comparing university rankings

Comparing university rankings

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12th International Conference on Scientometrics and Informetrics, ISSI 2009

作者： Aguillo, Isidro F. Bar-Ilan, Judit Levene, Mark Ortega, José Luis Cybermetrics Lab CCHS - CSIC Albasanz 26-28 28037 Madrid Spain Dept. Information Science Bar-Ilan University Ramat Gan 52900 Israel School of Computer Science and Information Systems Birkbeck University of London London WC1E 7HX United Kingdom Scientific Programming Division VICYT - CSIC Serrano 113 28006 Madrid Spain

Recently there is increasing interest in university rankings. Annual rankings of world universities are published by QS for the Times Higher Education Supplement, the Shanghai Jiao Tong University, the Higher Education and Accreditation Council of Taiwan and rankings based on Web visibility by the Cybermetrics Lab at CSIC. In this paper we compare the rankings using a set of similarity measures. For the rankings that are being published for a number of years we also examine longitudinal patterns. The rankings limited to European universities are compared to the ranking of the Centre for Science and Technology Studies at Leiden University. The findings show that there are reasonable similarities between the rankings, even though each applies a different methodology. The biggest differences are between the rankings provided by the QS-Times Higher Education Supplement and the Ranking Web of the CSIC Cybermetrics Lab. The highest similarities were observed between the Taiwanese and the Leiden rankings from European universities. Overall the similarities are increased when the comparison is limited to the European universities.

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A case study of software testers

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AI EDAM 2009年第1期3卷 35-51页

作者： Robin Lampert David Hamilton Elliot Soloway Yale University Department of Computer Science Cognition and Programming Project P. O. Box 2158 Yale Station New Haven CT 06520 IBM Systems Integration Division 3700 Bay Area Blvd. Houston TX 77058 U.S.A.

In an effort to learn more about how testers test code, we observed several testers while they designed tests to check a change which had been made to code. Using a case study methodology, we gathered empirical data from the ‘real world’—professional testers, and actual software products. We found that testers do share some common work patterns. These patterns can be seen in their information gathering, their use of heuristics and their construction of mental models. This work is extremely knowledge intensive, experience appears to have a useful effect. In this paper we will discuss how we collected and analysed our data. Then we will present some of our observations about how the testers gathered information, used heuristics, formed mental models and were affected by their previous experience in the course of designing their test scenarios. Based on these observations we comment on training and tools for testers.

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Using cellular automata for parallel simulation of laser dynamics with dynamic load balancing

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International Journal of High Performance systems Architecture 2008年第4期1卷 251-259页

作者： Guisado, J.L. de Vega, F. Fernández Jiménez-Morales, F.J. Iskra, K.A. Sloot, P.M.A. Departamento de Arquitectura y Tecnología de Computadores Universidad de Sevilla ETS Ingeniería Informática Avda. Reina Mercedes s/n. 41012 Sevilla Spain Centro Universitario de Mérida Universidad de Extremadura Sta. Teresa Jornet 38 06800 Mérida Badajoz Spain Departamento de Física de la Materia Condensada Universidad de Sevilla P.O. Box 1065 41080 Sevilla Spain Argonne National Laboratory Mathematics and Computer Science Division 9700 South Cass Avenue Argonne IL 60439 United States Section Computational Science Laboratory for Computing Systems Architecture and Programming University of Amsterdam Kruislaan 403 1098 SJ Amsterdam Netherlands

We present an analysis of the feasibility of executing a parallel bioinspired model of laser dynamics, based on cellular automata (CA), on the usual target platform of this kind of applications: a heterogeneous non-dedicated cluster. As this model employs a synchronous CA, using the single program, multiple data (SPMD) paradigm, it is not clear in advance if an appropriate efficiency can be obtained on this kind of platform. We have evaluated its performance including artificial load to simulate other tasks or jobs submitted by other users. A dynamic load balancing strategy with two main differences from most previous implementations of CA based models has been used. First, it is possible to migrate load to cluster nodes initially not belonging to the pool. Second, a modular approach is taken in which the model is executed on top of a dynamic load balancing tool - the Dynamite system - gaining flexibility. Very satisfactory results have been obtained, with performance increases from 60% to 80%. Copyright © 2008, Inderscience Publishers.

关键词： Cellular automata

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Strict bidirectional type checking

Strict bidirectional type checking

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TLDI'05: 2005 ACM SIGPLAN International Workshop on Types in Languages Design and Implementation

作者： Chlipala, Adam Petersen, Leaf Harper, Robert Computer Science Division University of California Berkeley United States Programming Systems Laboratory Intel Corporation United States Computer Science Department Carnegie Mellon University United States

ISBN: (纸本)1581139993

Completely annotated lambda terms (such as are arrived at via the straightforward encodings of various types from System F) contain much redundant type information. Consequently, the completely annotated forms are almost never used in practice, since partially annotated forms can be defined which still allow syntax directed type checking. An additional optimization that is used in some proof and type systems is to take advantage of the context of occurrence of terms to further elide type information using bidirectional type checking rules. While this technique is generally effective, we show that there exist bidirectional terms which exhibit asymptotic increases in the size of their type decorations when sequentialized into a named-form calculus (a common first step in compilation). In this paper, we introduce a refinement of the bidirectional type system based on strict logic which allows additional type decorations to be eliminated, and show that it is well-behaved under sequentialization. Copyright 2005 ACM.

关键词： Information theory

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A dynamic compilation framework for controlling microprocessor energy and performance 38

A dynamic compilation framework for controlling microprocess...

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MICRO-38: 38th Annual IEEE/ACM International Symposium on Microarchitecture

作者： Wu, Qiang Reddi, V.J. Wu, Youfeng Lee, Jin Connors, Dan Brooks, David Martonosi, Margaret Clark, Douglas W. Depts. of Computer Science Electrical Engjneering Princeton University Dept. of Electrical and Computer Engineering U. of Colorado Boulder Programming Systems Lab. Corporate Tech. Group Intel Corporation Division of Engineering and Applied Science Harvard University

ISBN: (纸本)0769524400

Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardware, OS timeinterrupts, or static-compiler techniques. However, substantially greater gains can be realized when control opportunities are also explored in a dynamic compilation environment. There are several advantages to deploying DVFS and managing energy/performance tradeoffs through the use of a dynamic compiler. Most importantly, dynamic compiler driven DVFS is fine-grained, code-aware, and adaptive to the current microarchitecture environment. This paper presents a design framework of the run-time DVFS optimizer in a general dynamic compilation system. A prototype of the DVFS optimizer is implemented and integrated into an industrialstrength dynamic compilation system. The obtained optimization system is deployed in a real hardware platform that directly measures CPU voltage and current for accurate power and energy readings. Experimental results, based on physical measurements for over 40 SPEC or Olden benchmarks, show that significant energy savings are achieved with little performance degradation. SPEC2K FP benchmarks benefit with energy savings of up to 70% (with 0.5% performance loss). In addition, SPEC2K INT show up to 44% energy savings (with 5% performance loss), SPEC95 FP save up to 64% (with 4.9% performance loss), and Olden save up to 61% (with 4.5% performance loss). On average, the technique leads to an energy delay product (EDP) improvement that is 3X-5X better than static voltage scaling, and is more than 2X (22% vs. 9%) better than the reported DVFS results of prior static compiler work. While the proposed technique is an effective method for microprocessor voltage and frequency control, the design framework and methodology described in this paper have broader potential to address other energy and power issues such as di/dt and thermal control. © 2005 IEEE.

关键词： Microprocessor chips

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A dynamic compilation framework for controlling microprocessor energy and performance

A dynamic compilation framework for controlling microprocess...

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IEEE/ACM International Symposium on Microarchitecture (MICRO)

作者： Qiang Wu V.J. Reddi Youfeng Wu Jin Lee D. Connors D. Brooks M. Martonosi D.W. Clark Depts. of Computer Science Electrical Engineering Princeton University USA Department of Electrical and Computer Engineering University of Colorado Boulder USA Programming Systems Laboratory Intel Corporation USA Division of Engineering and Applied Science Harvard University USA

Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardware, OS time-interrupts, or static-compiler techniques. However, substantially greater gains can be realized when control opportunities are also explored in a dynamic compilation environment. There are several advantages to deploying DVFS and managing energy/performance tradeoffs through the use of a dynamic compiler. Most importantly, dynamic compiler driven DVFS is fine-grained, code-aware, and adaptive to the current microarchitecture environment. This paper presents a design framework of the run-time DVFS optimizer in a general dynamic compilation system. A prototype of the DVFS optimizer is implemented and integrated into an industrial-strength dynamic compilation system. The obtained optimization system is deployed in a real hardware platform that directly measures CPU voltage and current for accurate power and energy readings. Experimental results, based on physical measurements for over 40 SPEC or Olden benchmarks, show that significant energy savings are achieved with little performance degradation. SPEC2K FP benchmarks benefit with energy savings of up to 70% (with 0.5% performance loss). In addition, SPEC2K INT show up to 44% energy savings (with 5% performance loss), SPEC95 FP save up to 64% (with 4.9% performance loss), and Olden save up to 61% (with 4.5% performance loss). On average, the technique leads to an energy delay product (EDP) improvement that is 3times-5times better than static voltage scaling, and is more than 2times (22% vs. 9%) better than the reported DVFS results of prior static compiler work. While the proposed technique is an effective method for microprocessor voltage and frequency control, the design framework and methodology described in this paper have broader potential to address other energy and power issues such as di/dt and thermal control

关键词： Dynamic compiler Microprocessors Performance loss Voltage control Hardware Energy measurement Dynamic voltage scaling Frequency Energy management Microarchitecture

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Perceived Difficulty and User Control in Mouse Usage

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Proceedings of the Human Factors and Ergonomics Society Annual Meeting 1991年第5期35卷 295 - 299页

作者： Greg W. Hill William A. Gunn Shirley L. Martin David R. Schwartz Programming Systems Division IBM Corporation Cary NC

This study was conducted to determine the relative perceived difficulty of performing different mouse tasks (pairings of mouse actions with button combinations). Right-handed individuals with various types of computer experience used a 3-button mouse to perform 49 simple target acquisition tasks. Perceived difficulty judgments varied with tasks. Significant groupings of tasks along the difficulty dimension were also apparent. For most mouse tasks, the left and center buttons were judged to be relatively easier to use than the right button. Additionally, chorded use of the left and center buttons was perceived to be easier than use of the right button alone. The results suggest that systems should not rely upon the right mouse button as a default setting for system-related functions. Other considerations for mouse usage are discussed.

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