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Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic systems (ITHERM)

作者： Daniel Hackenberg Michael K. Patterson Center for Information Services and High Performance Computing Technische Universität Dresden Dresden Saxony Germany Technical Computing Group Systems Architecture and Pathfinding Intel Corporation Dupont Washington USA

The rate of innovation in IT system design and especially in High Performance computing continues to be very high. To keep pace TU Dresden has constructed its new data center using the Plenum concept. The traditional raised floor was substituted by a full building story, creating a highly flexible space to transport power, water, and air. A strict hot-aisle air separation is used and the computer room air-handling (CRAH) units in downflow configuration are positioned directly beneath the hot aisles. This unique arrangement necessitates an unconventional downward flow of hot air from the enclosed hot aisle. Extensive testing has been performed in a cluster of 24 racks (12 per side) equipped with (3+1)×100 kW CRAH unit cooling capacity and 60 test fixtures (air heaters) with 5-15 kW heating power each. Our analysis demonstrates the extremely high efficiency of this air cooling concept even in high-density configurations, up to at least 30 kW per rack. This efficiency is mostly due to the very short airflow paths and wide open cross-sections. We also showcase that no malicious thermal stratification occurs in our hot air downflow configuration. A detailed analysis of the CRAH controls for temperature (through cooling water flow modulation) and airflow (fan speed) highlights the challenges of such control systems in enclosed hot aisle configurations at high power density and short feedback loops. The analysis also considers dynamically changing load patterns including very low partial load scenarios and aspects of operational reliability.

关键词： Cooling Floors Computer architecture Computers Temperature sensors Heating

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On energy efficiency of liquid cooled HPC datacenters

On energy efficiency of liquid cooled HPC datacenters

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Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic systems (ITHERM)

作者： Michael K. Patterson Shankar Krishnan John M. Walters Technical Computing Group Systems Architecture and Path finding Intel Corporation Dupont Washington USA India Institute of Technology Mumbai India Walters Engineering LLC Hillsboro Oregon USA

HPC Data Center's performance and growth are now being limited by both cost and power. A cost-efficient data center and an energy-efficient data center are all too often mutually exclusive, but they do not have to be. Liquid cooling is one area that, when done right, can improve both costs and energy efficiency. The design for liquid cooling systems generally begins with the ASHRAE liquid cooling datacenter classes. These provide guidance to both datacenter facility cooling system designers and electronic equipment manufacturers by providing a common baseline and understanding of the interface conditions between the cooling and the IT equipment. Further, the liquid cooling classes also suggest possible cooling equipment for a given datacenter class. Due to the aforementioned cooling equipment prescription, perception exists that moving from W1/W2 class environments to W3 or W4 classes represent increased energy efficiency during IT equipment operation. In this paper we show this not to be the case universally and explore a more detailed, technical approach to optimizing both cost and energy efficiency. The range of parameters includes geographical and climate conditions, state of the existing data center cooling infrastructure (greenfield, retrofit, cluster change-out, expansion), and IT level liquid cooling architecture. Through this analysis we show that for energy efficient operation of the IT equipment there exists an optimum liquid operating temperature that can also provide the lowest TCO. This temperature can drive the right capital investment as well as reduce facility operational expense and IT operational expense. We also explore the impact on reliability, the controls architecture, use of efficiency metrics, cluster compute performance, and opportunities for energy re-use.

关键词： Liquid cooling Energy efficiency Poles and towers Temperature distribution Guidelines Meteorology

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Publisher Correction: The Scales Project, a cross-national dataset on the interpretation of thermal perception scales

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Scientific data 2020年第1期7卷 11页

作者： Marcel Schweiker Amar Abdul-Zahra Maíra André Farah Al-Atrash Hanan Al-Khatri Rea Risky Alprianti Hayder Alsaad Rucha Amin Eleni Ampatzi Alpha Yacob Arsano Montazami Azadeh Elie Azar Bannazadeh Bahareh Amina Batagarawa Susanne Becker Carolina Buonocore Bin Cao Joon-Ho Choi Chungyoon Chun Hein Daanen Siti Aisyah Damiati Lyrian Daniel Renata De Vecchi Shivraj Dhaka Samuel Domínguez-Amarillo Edyta Dudkiewicz Lakshmi Prabha Edappilly Jesica Fernández-Agüera Mireille Folkerts Arjan Frijns Gabriel Gaona Vishal Garg Stephanie Gauthier Shahla Ghaffari Jabbari Djamila Harimi Runa T Hellwig Gesche M Huebner Quan Jin Mina Jowkar Renate Kania Jungsoo Kim Nelson King Boris Kingma M Donny Koerniawan Jakub Kolarik Shailendra Kumar Alison Kwok Roberto Lamberts Marta Laska M C Jeffrey Lee Yoonhee Lee Vanessa Lindermayr Mohammadbagher Mahaki Udochukwu Marcel-Okafor Laura Marín-Restrepo Anna Marquardsen Francesco Martellotta Jyotirmay Mathur Gráinne McGill Isabel Mino-Rodriguez Di Mou Bassam Moujalled Mia Nakajima Edward Ng Marcellinus Okafor Mark Olweny Wanlu Ouyang Ana Ligia Papst de Abreu Alexis Pérez-Fargallo Indrika Rajapaksha Greici Ramos Saif Rashid Christoph F Reinhart Ma Isabel Rivera Mazyar Salmanzadeh Karin Schakib-Ekbatan Stefano Schiavon Salman Shooshtarian Masanori Shukuya Veronica Soebarto Mohammad Tahsildoost Federico Tartarini Despoina Teli Priyam Tewari Samar Thapa Maureen Trebilcock Jörg Trojan Ruqayyatu B Tukur Conrad Voelker Yeung Yam Liu Yang Gabriela Zapata-Lancaster Yongchao Zhai Yingxin Zhu Zahra Sadat Zomorodian Building Science Group Karlsruhe Institute of Technology Englerstr. 7 76131 Karlsruhe Germany. marcel.schweiker@kit.edu. WIN-Kolleg Thermal comfort and pain Heidelberg Academy of Sciences and Humanities Karlstr. 4 69117 Heidelberg Germany. marcel.schweiker@kit.edu. Mechanical Engineering Department University of Technology Iraq Al sinaea 10066 Baghdad Iraq. CTC/Department of Civil Engineering Federal University of Santa Catarina Rua João Pio Duarte Silva s/n. Córrego Grande 88.040-901 Florianópolis SC Brazil. School of Architecture and Built Environment German Jordanian University Darat Othman Bdeir 11180 Amman Jordan. Civil and Architectural Engineering Department Sultan Qaboos University Al-Khod P.O. Box: 33 PC: 123 Muscat Oman. Laboratory of Building Technology Department of Architecture Institut Teknologi Bandung Ganesha 10 40132 Bandung Indonesia. Department of Building Physics Bauhaus-University Weimar Coudraystr. 11A 99423 Weimar Germany. Energy & Climate Change Group Faculty of Engineering & Physical Sciences University of Southampton University Road SO17 1BJ Southampton United Kingdom. Welsh School of Architecture Cardiff University King Edward VII Avenue CF10 3NB Cardiff United Kingdom. Department of Architecture Massachusetts Institute of Technology Massachusetts Ave 02139 Cambridge United States of America. Faculty of Engineering Environment and Computing BNE Research Centre Coventry University Gulson road CV1 2JH Coventry United Kingdom. Industrial and Systems Engineering Khalifa University Masdar Campus Building 1B 54224 Abu Dhabi United Arab Emirates. Architecture University of Tehran Kish International Campus Niyayesh St. Mirmohanna Blvd 79416-55665 Kish Iran. Department of Architecture Ahmadu Bello University Zaria Nigeria Samaru Zaria Nigeria. WIN-Kolleg Thermal comfort and pain Heidelberg Academy of Sciences and Humanities Karlstr. 4 69117 Heidelberg Germany. Department of Cognitive and Clinical Neurosci

An amendment to this paper has been published and can be accessed via a link at the top of the paper.

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26th Annual Computational Neuroscience Meeting (CNS*2017) of the Organization for Computational Neuroscience Antwerp, Belgium, July 15-20, 2017

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BMC NEUROSCIENCE 2017年第SUPPL 1期18卷 59-59页

作者： [Anonymous] Indiana University Purdue University Indianapolis Indianapolis IN 46032 USA Stark Neurosciences Research Institute Indiana University School of Medicine Indianapolis IN 46032 USA Department of Mathematics East Carolina University Greenville NC 27858 USA Jülich Supercomputing Centre Forschungszentrum Jülich 52425 Jülich Germany Future Systems Swiss National Supercomputing Centre 8092 Zurich Switzerland User Engagement and Support Swiss National Supercomputing Centre 6900 Lugano Switzerland Institut de Neurosciences des Systèmes Aix Marseille Univ 13005 Marseille France Simulation Lab Neuroscience Forschungszentrum Jülich Jülich Germany Department of Experimental Psychology Ghent University 9000 Ghent Belgium Donders Center for Cognitive Neuroimaging Radboud University 6525HR Nijmegen The Netherlands Department of Electrical Computer and Energy Engineering University of Colorado Boulder CO 80309 USA Department of Neurosurgery Johns Hopkins School of Medicine Baltimore MD 21287 USA Department of Neurology Johns Hopkins School of Medicine Baltimore MD 21287 USA Department of Otolaryngology Johns Hopkins School of Medicine Baltimore MD 21287 USA INSERM U968 Paris France Sorbonne Universités UPMC University Paris 06 UMR_S 968 Institut de la Vision Paris France CNRS UMR_7210 Paris France Department of Computer Architecture and Technology University of Granada (CITIC) Granada Spain Sorbonne Universités UPMC Univ Paris 06 INSERM CNRS Institut de la Vision Paris France Department of Adaptive Machine Systems Osaka University Osaka Japan Department of Computer Science University of Cergy-Pontoise Cergy-Pontoise France Department of Physics and Astronomy College of Charleston Charleston SC 29424 USA School of Physics Faculty of Science University of Sydney Sydney NSW 2006 Australia Center of Excellence for Integrative Brain Function Australian Research Council Sydney Australia Max Planck Institute for Human Cognitive and Brain Sciences Saxony Lei

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Scalable multi-core simulation using parallel dynamic binary translation

Scalable multi-core simulation using parallel dynamic binary...

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2011 11th International Conference on Embedded Computer systems: architectures, Modeling and Simulation, IC-SAMOS 2011

作者： Almer, Oscar Böhm, Igor Von Koch, Tobias Edler Franke, Björn Kyle, Stephen Seeker, Volker Thompson, Christopher Topham, Nigel Institute for Computing Systems Architecture University of Edinburgh United Kingdom Software Engineering for Embedded Systems Group Technical University Berlin Germany

ISBN: (纸本)9781457708008

In recent years multi-core processors have seen broad adoption in application domains ranging from embedded systems through general-purpose computing to large-scale data centres. Simulation technology for multi-core systems, however, lags behind and does not provide the simulation speed required to effectively support design space exploration and parallel software development. While state-of-the-art instruction set simulators (Iss) for single-core machines reach or exceed the performance levels of speed-optimised silicon implementations of embedded processors, the same does not hold for multi-core simulators where large performance penalties are to be paid. In this paper we develop a fast and scalable simulation methodology for multi-core platforms based on parallel and just-in-time (Jit) dynamic binary translation (Dbt). Our approach can model large-scale multi-core configurations, does not rely on prior profiling, instrumentation, or compilation, and works for all binaries targeting a state-of-the-art embedded multi-core platform implementing the ARCompact instruction set architecture (Isa). We have evaluated our parallel simulation methodology against the industry standard Splash-2 and Eembc MultiBench benchmarks and demonstrate simulation speeds up to 25,307 Mips on a 32-core 86 host machine for as many as 2048 target processors whilst exhibiting minimal and near constant overhead. © 2011 IEEE.

关键词： Embedded systems

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Scalable multi-core simulation using parallel dynamic binary translation

Scalable multi-core simulation using parallel dynamic binary...

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International Conference on Embedded Computer systems: architectures, Modeling and Simulation (IC-SAMOS)

作者： Oscar Almer Igor Böhm Tobias Edler von Koch Björn Franke Stephen Kyle Volker Seeker Christopher Thompson Nigel Topham Institute of Computing Systems Architecture University of Edinburgh UK Software Engineering for Embedded Systems Group Technical University of Berlin Germany

In recent years multi-core processors have seen broad adoption in application domains ranging from embedded systems through general-purpose computing to large-scale data centres. Simulation technology for multi-core systems, however, lags behind and does not provide the simulation speed required to effectively support design space exploration and parallel software development. While state-of-the-art instruction set simulators (ISS) for single-core machines reach or exceed the performance levels of speed-optimised silicon implementations of embedded processors, the same does not hold for multi-core simulators where large performance penalties are to be paid. In this paper we develop a fast and scalable simulation methodology for multi-core platforms based on parallel and just-in-time (JIT) dynamic binary translation (DBT). Our approach can model large-scale multi-core configurations, does not rely on prior profiling, instrumentation, or compilation, and works for all binaries targeting a state-of-the-art embedded multi-core platform implementing the ARCompact instruction set architecture (ISA). We have evaluated our parallel simulation methodology against the industry standard Splash-2 and EEMBC MULTIBENCH benchmarks and demonstrate simulation speeds up to 25,307 Mips on a 32-core ×86 host machine for as many as 2048 target processors whilst exhibiting minimal and near constant overhead.

关键词： Program processors Multicore processing Random access memory Hardware Computational modeling Field programmable gate arrays Benchmark testing

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Fast subgraph isomorphism detection for graph-based retrieval

Fast subgraph isomorphism detection for graph-based retrieva...

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19th International Conference on Case-Based Reasoning, ICCBR 2011

作者： Weber, Markus Langenhan, Christoph Roth-Berghofer, Thomas Liwicki, Marcus Dengel, Andreas Petzold, Frank GmbH Trippstadter Straße 122 67663 Kaiserslautern Germany Knowledge-Based Systems Group Department of Computer Science University of Kaiserslautern P.O. Box 3049 67653 Kaiserslautern Germany Department of Architectural Informatics Faculty of Architecture Technical University of Munich Arcisstrasse 21 80333 Munich Germany Explanation-aware Computing Systems Institute of Computer Science University of Hildesheim Marienburger Platz 22 31141 Hildesheim Germany

ISBN: (纸本)9783642232909

In this paper we present a method for a graph-based retrieval and its application in architectural floor plan retrieval. The proposed method is an extension of a well-known method for subgraph matching. This extension significantly reduces the storage amount and indexing time for graphs where the nodes are labeled with a rather small amount of different classes. In order to reduce the number of possible permutations, a weight function for labeled graphs is introduced and a well-founded total order is defined on the weights of the labels. Inversions which violate the order are not allowed. A computational complexity analysis of the new preprocessing is given and its completeness is proven. Furthermore, in a number of practical experiments with randomly generated graphs the improvement of the new approach is shown. In experiments performed on random sample graphs, the number of permutations has been decreased to a fraction of 10-18 in average compared to the original approach by Messmer. This makes indexing of larger graphs feasible, allowing for fast detection of subgraphs. © 2011 Springer-Verlag.

关键词： Graph theory

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Editorial: Dependability and security

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IEEE Transactions on Dependable and Secure computing 2008年第1期5卷 1-3页

作者： Iyer, Ravishankar K. Gligor, Virgil D. Kalbarczyk, Zbigniew T. Kanoun, Karama Katzenbeisser, Stefan Mukherjee, Shubu Shieh, Shiuhpyng Zorian, Yervant Department of Electrical and Computer Engineering Carnegie Mellon University Microsoft's Trusted Computing Academic Advisory Board Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois Urbana-Champaign United States IEEE IEEE Computer Society LAAS CNRS IFIP Working Group 10.4 on Dependable Computing and Fault Tolerance Special Interest Group on Dependability Benchmarking IFIP Working Group 10.4 French SEE Technical Committee on Trustworthy Computer Systems SEE Working Group Design and Validation for Dependability Technical University Munich Germany Darmstadt University of Technology ACM IACR Intel's SER Tech Council Intel's Architecture Patent Committee Taiwan Information Security Center NCTU IEEE Reliability Society Taipei and Tainan IACR United States Virage Logic Corp. AT and T Bell Laboratories Logic Vision Inc. University of British Columbia IEEE Test Technology Technical Council

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