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Cross-technology Communication between WiFi and ZigBee 9

Cross-Technology Communication between WiFi and ZigBee

9th IEEE International Symposium on Microwave, Antenna, Propagation and EMC Technologies for Wireless Communications, MAPE 2022

作者： Fan, Wendong Chen, Tian Gu, Yu Li, Yang Hefei University of Technology S2AC Lab School of Computer and Information Hefei China Hefei University of Technology Institute of Affective Computing and Systems Architecture Hefei China Anhui Agricultural University School of Information & Computer Hefei China

ISBN: (数字)9781665427753

ISBN: (纸本)9781665427753

The coexistence of heterogeneous devices in the Internet of Things wireless network brings a new topic of cross-technology communication in order to improve the communication efficiency between heterogeneous devices and promote the cooperation between heterogeneous devices. WiFi and ZigBee are the two most commonly used IoT devices in IoT environments. They have the advantages of low communication delay, high speed, low cost, and easy deployment. Since the spectrum of WiFi and ZigBee overlap, ZigBee signal will affect the transmission of CSI signal. We propose a CTC technique based on machine learning and deep learning, which uses only WiFi channel state information (CSI), and can distinguish whether there is ZigBee signal transmission in WiFi signals by classifying WiFi channel state information. In this paper, machine learning classification methods and deep learning methods are used to classify CSI sequences respectively. We extract the features of 8 CSI sequences to improve the accuracy of machine learning classifier and LSTM classifier, and adopt transformer network classifier to further improve the classification accuracy. In our experimental dataset, the highest accuracy rate can reach 94.9%. The evaluation results show that the accuracy of this method is significantly higher than the existing classification methods. © 2022 IEEE.

关键词： Channel state information

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Optimizing sparse matrix vector multiplication using cache blocking method on Fermi GPU

Optimizing sparse matrix vector multiplication using cache b...

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13th ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing, SNPD 2012

作者： Xu, Weizhi Zhang, Hao Jiao, Shuai Wang, Da Song, Fenglong Liu, Zhiyong Key Lab. of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China Graduate University Chinese Academy of Sciences Beijing China

ISBN: (纸本)9780769547619

It is an important task to tune performance for sparse matrix vector multiplication (SpMV), but it is also a difficult task because of its irregularity. In this paper, we propose a cache blocking method to improve the performance of SpMV on the emerging GPU architecture. The sparse matrix is partitioned into many sub-blocks, which are stored in CSR format. With the blocking method, the corresponding part of vector x can be reused in the GPU cache, so the time spent on accessing the global memory for vector x is reduced heavily. Experimental results on GeForce GTX 480 show that SpMV kernel with the cache blocking method is 5x faster than the unblocked CSR kernel in the best case. © 2012 IEEE.

关键词： Graphics processing unit

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A scalable parallel ray tracing algorithm for satellite imagery

A scalable parallel ray tracing algorithm for satellite imag...

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IEEE International Conference on computer Research and Development

作者： Li, Yu-Gang Zhao, Kun Huang, Yu-Qing Qiu, Zhen-Ge Liu, Zhi-Yong Beijing Lab. of Intelligent Information Technology School of Computer Science BIT Beijing 100081 China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100081 China Institute of Computing Technology Chinese Academy Sciences Beijing China

ISBN: (纸本)9781612848372

Ray-tracing, can produce high-quality images, however, the use of ray-tracing has been limited due to its high demands on computational power and memory bandwidth, especially in the case of satellite imagery. In this paper, we propose a scalable parallel ray tracing algorithm of satellite imagery on a cluster of multi-core architecture. The algorithm combines demand-driven and data-driven models in order to reduce communication on the cost of maintaining redundant data. In order to make the most of computer's parallelism and increase computational efficiency, it combines two levels of parallelisms, the TLP parallelism brought by the many core architecture and the inter-node parallelism via MPI and OpenMP. Experiment results show that the algorithm is highly scalability. © 2011 IEEE.

关键词： Satellite imagery

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Energy efficiency of heterogeneous multicore system based on the enhanced Amdahl's law

Energy efficiency of heterogeneous multicore system based on...

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作者： Pei, Songwen Zhang, Junge Xiong, Naixue Kim, Myoung-Seo Gaudiot, Jean-Luc Shanghai Key Lab of Modern Optical Systems University of Shanghai for Science and Technology Shanghai200093 China Parallel Systems and Computer Architecture Lab University of California IrvineCA92697 United States

Energy efficiency is one of the biggest challenges of designing future heterogeneous multicore system, beyond performance, hereby, we propose an energy efficiency analytical model for heterogeneous multicore system based on the enhanced Amdahl's law. The model extends the traditional computing-centric model by considering the overhead of data preparation which potentially includes the overhead of communication, data transfer, synchronisation, etc. The analysis clearly shows that decreasing the overhead of data preparation is a promising approach to reach higher performance of computation and greater energy efficiency. Therefore, more informed trade-offs should be taken when we design a modern heterogeneous processor system within limited budget of energy. © 2018 Inderscience Enterprises Ltd.

关键词： Energy efficiency

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Quantum computer architecture: Towards full-stack quantum accelerators

arXiv

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arXiv 2019年

作者： Bertels, K. Sarkar, A. Mouedenne, A.A. Hubregtsen, T. Yadav, A. Krol, A. Ashraf, I. Quantum Computer Architecture lab Delft University of Technology Netherlands

This paper presents the definition and implementation of a quantum computer architecture to enable creating a new computational device - a quantum computer as an accelerator. A key question addressed is what such a quantum computer is and how it relates to the classical processor that controls the entire execution process. In this paper, we present explicitly the idea of a quantum accelerator which contains the full stack of the layers of an accelerator. Such a stack starts at the highest level describing the target application of the accelerator. The next layer abstracts the quantum logic outlining the algorithm that is to be executed on the quantum accelerator. In our case, the logic is expressed in the universal quantum-classical hybrid computation language developed in the group, called OpenQL, which visualised the quantum processor as a computational accelerator. The OpenQL compiler translates the program to a common assembly language, called cQASM, which can be executed on a quantum simulator. The cQASM represents the instruction set that can be executed by the micro-architecture implemented in the quantum accelerator. In a subsequent step, the compiler can convert the cQASM to generate the eQASM, which is executable on a particular experimental device incorporating the platform-specific parameters. This way, we are able to distinguish clearly the experimental research towards better qubits, and the industrial and societal applications that need to be developed and executed on a quantum device. The first case offers experimental physicists with a full-stack experimental platform using realistic qubits with decoherence and error-rates while the second case offers perfect qubits to the quantum application developer, where there is no decoherence nor error-rates. We conclude the paper by explicitly presenting three examples of full-stack quantum accelerators, for an experimental superconducting processor, for quantum accelerated genome sequencing and for near-ter

关键词： Quantum theory

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Towards AER VITE: Building spike gate signal

Towards AER VITE: Building spike gate signal

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2012 19th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2012

作者： Perez-Pena, Fernando Morgado-Estevez, Arturo Rioja-Del-Rio, Carlos Linares-Barranco, Alejandro Jimenez-Fernandez, Angel Lopez-Coronado, Juan Munoz-Lozano, Jose Luis Applied Robotics Lab High School of Engineering University of Cadiz Spain Automatic and System Engineering Department University Polytechnics of Cartagena Spain Department of Computer Architecture and Technology ETSI Computer Science University of Seville Spain

ISBN: (纸本)9781467312615

Neuromorphic engineers aim to mimic the precise and efficient mechanisms of the nervous system to process information using spikes from sensors to actuators. There are many available works that sense and process information in a spike-based way. But there are still several gaps in the actuation and motor control field in a spike-based way. Spike-based Proportional-Integrative- Derivative controllers (PID) are present in the literature. On the other hand, neuro-inspired control models as VITE (Vector Integration To End point) and FLETE (Factorization of muscle Length and muscle Tension) are also present in the literature. This paper presents another step toward the spike implementation of those neuro-inspired models. We present a spike-based ramp multiplier. VITE algorithm generates the way to achieve a final position targeted by a mobile robotic arm. The block presented is used as a gate for the way involved and it also puts the incoming movement on speed with a variable slope profile. Only spikes for information representation were used and the process is in real time. The software simulation based on Simulink and Xilinx System Generator shows the accurate adjust to the traditional processing for short time periods and the hardware tests confirm and extend the previous simulated results for any time. We have implemented the spikes generator, the ramp multiplier and the low pass filter into the Virtex-5 FPGA and connected this with an USB-AER (Address Event Representation) board to monitor the spikes. © 2012 IEEE.

关键词： Muscle

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Quantum computer architecture: Towards Full-Stack Quantum Accelerators

Quantum Computer Architecture: Towards Full-Stack Quantum Ac...

引用

Design, Automation and Test in Europe Conference and Exhibition

作者： K. Bertels A. Sarkar T. Hubregtsen. M. Serrao A. A. Mouedenne A. Yadav A. Krol I. Ashraf Quantum Computer Architecture lab Delft University of Technology Netherlands

ISBN: (数字)9783981926347

ISBN: (纸本)9781728144689

关键词： Qubit computer architecture Logic gates Field programmable gate arrays Process control Instruction sets

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Power signature analysis

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IEEE Power and Energy Magazine 2003年第2期1卷 56-63页

作者： Laughman, Christopher Lee, Kwangduk Cox, Robert Shaw, Steven Leeb, Steven Norford, Les Armstrong, Peter Lab. of Electromagnet. and Electron. Dept. of Elec. and Computer Eng. Montana State University Bozeman MT United States Department of Architecture MIT Department of Electrical Engineering Department of Mechanical Engineering Department of Building Technology

Field tests demonstrated the value of enhancements that enable an advanced nonintrusive load monitoring system to tackle complex monitoring environments. Nonintrusive load monitoring (NILM) can determine the operating schedule of electrical loads in a target system from measurements made at a centralized location, such as the electric utility service entry. In contrast to other systems, NILM reduces sensor costs by using relatively few sensors.

关键词： Electric load forecasting

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HAFNI-enabled largescale platform for neuroimaging informatics (HELPNI)

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Brain Informatics 2015年第4期2卷 225-238页

作者： Makkie, Milad Zhao, Shijie Jiang, Xi Lv, Jinglei Zhao, Yu Ge, Bao Li, Xiang Han, Junwei Liu, Tianming Cortical Architecture Imaging and Discovery Lab Department of Computer Science and Bioimaging Research Center The University of Georgia AthensGA United States School of Automation Northwestern Polytechnical University Xi’an China School of Physics & Information Technology Shaanxi Normal University Xi’an China

Tremendous efforts have thus been devoted on the establishment of functional MRI informatics systems that recruit a comprehensive collection of statistical/computational approaches for fMRI data analysis. However, the state-of-the-art fMRI informatics systems are especially designed for specific fMRI sessions or studies of which the data size is not really big, and thus has difficulty in handling fMRI ‘big data.’ Given the size of fMRI data are growing explosively recently due to the advancement of neuroimaging technologies, an effective and efficient fMRI informatics system which can process and analyze fMRI big data is much needed. To address this challenge, in this work, we introduce our newly developed informatics platform, namely, ‘HAFNI-enabled largescale platform for neuroimaging informatics (HELPNI).’ HELPNI implements our recently developed computational framework of sparse representation of whole-brain fMRI signals which is called holistic atlases of functional networks and interactions (HAFNI) for fMRI data analysis. HELPNI provides integrated solutions to archive and process large-scale fMRI data automatically and structurally, to extract and visualize meaningful results information from raw fMRI data, and to share open-access processed and raw data with other collaborators through web. We tested the proposed HELPNI platform using publicly available 1000 Functional Connectomes dataset including over 1200 subjects. We identified consistent and meaningful functional brain networks across individuals and populations based on resting state fMRI (rsfMRI) big data. Using efficient sampling module, the experimental results demonstrate that our HELPNI system has superior performance than other systems for large-scale fMRI data in terms of processing and storing the data and associated results much faster. © 2015, The Author(s).

关键词： Big data

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A hop-by-hop energy efficient distributed routing cheme

A hop-by-hop energy efficient distributed routing cheme

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作者： Hou, Chenying Zhang, Fa Anta, Antonio Fernández Wang, Lin Liu, Zhiyong Institute of Computing Technology CAS University of Chinese Academy of Sciences Beijing China Institute IMDEA Networks Madrid Spain Institute of Computing Technology Chinese State Key Lab for Computer Architecture CAS Beijing China

Energy inefficiencies in current networks provide both challenges and opportunities for energy saving. Recently, there are many works focusing on minimizing energy cost from the routing perspective. However, most existing work view them as optimization problems and solve them in a centralized manner such as with a solver or using approximations. In this paper, we focus on a network-wide bi-objective optimization problem, which simultaneously minimizes the total energy consumption using speed scaling and the total traffic delay. We propose a hop-by-hop dynamic distributed routing scheme for the implementation of this network-wide optimization problem. Our scheme is more practical to realize in large distributed networks compared with current centralized energy minimization methods. We can also achieve near global optimal in a distributed manner, while most used shortest path routing protocols such as OSPF cannot make it. Our routing scheme is totally distributed and maintains loop-free routes in every instant. Simulations conducted in real data sets show that the distributed loop-free routing scheme converges to near Pareto optimal values. Also, our method outperforms the widely applied shortest path routing strategy by 30% in energy saving.

关键词： Energy utilization

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