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检索条件"机构=The Department of Computer Architecture and Embedded Systems"

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A dataflow inspired programming paradigm for coarse-grained reconfigurable arrays

A dataflow inspired programming paradigm for coarse-grained ...

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10th International Symposium on Reconfigurable Computing: architectures, Tools, and Applications, ARC 2014

作者： Niedermeier, A. Kuper, Jan Smit, Gerard J. M. Computer Architecture for Embedded Systems Group Department of Electrical Engineering Mathematics and Computer Science University of Twente Netherlands

ISBN: (纸本)9783319059594

In this paper, we present a new approach towards programming coarse-grained reconfigurable arrays (CGRAs) in an intuitive, dataflow inspired way. Based on the observation that available CGRAs are usually programmed using C, which lacks proper support for instruction-level parallelism, we instead started from a dataflow perspective combined with a language that inherently supports parallel structures. Our programming paradigm decouples the local functionality of a core from the global flow of data, i.e. the kernels from the routing. We will describe the ideas of our programming paradigm and also the language and compiler itself. Our complete system, including the CGRA, the programming language and the compiler, was developed using Haskell, which leads to a complete, sound system. We finish the paper with the implementation of a number of algorithms using our system. © 2014 Springer International Publishing Switzerland.

关键词： Program compilers

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A predictor-based power-saving policy for DRAM memories

A predictor-based power-saving policy for DRAM memories

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15th Euromicro Conference on Digital System Design, DSD 2012

作者： Thomas, Gervin Chandrasekar, Karthik Åkesson, Benny Juurlink, Ben Goossens, Kees Technische Universität Berlin Department of Computer Engineering and Microelectronics Embedded Systems Architecture Berlin Germany Technische Universiteit Delft Department of Computer Engineering Delft Netherlands Technische Universiteit Eindhoven Department of Electrical Engineering Electronic Systems Eindhoven Netherlands

ISBN: (纸本)9780769547985

Reducing power/energy consumption is an important goal for all computer systems, from servers to battery-driven hand-held devices. To achieve this goal, the energy consumption of all system components needs to be reduced. One of the most power-hungry components is the off-chip DRAM, even when it is idle. DRAMs support different power-saving modes, such as self-refresh and power-down, but employing them every time the DRAM is idle, reduces performance due to their power-up latencies. The self-refresh mode offers large power savings, but incurs a long power-up latency. The power-down mode, on the other hand, has a shorter power-up latency, but provides lower power savings. In this paper, we propose and evaluate a novel power-saving policy that combines the best of both power-saving modes in order to achieve significant power reductions with a marginal performance penalty. To accomplish this, we use a history-based predictor to forecast the duration of an idle period and then either employ self-refresh, or power-down, or a combination of both power saving modes. Significant refinements are made to the predictor to maximize the energy savings and minimize the performance penalty. The presented policy is evaluated using several applications from the multimedia domain and the experimental results show that it reduces the total DRAM energy consumption between 68.8% and 79.9% at a negligible performance penalty between 0.3% and 2.2%. © 2012 IEEE.

关键词： Dynamic random access storage

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A Predictor-Based Power-Saving Policy for DRAM Memories

A Predictor-Based Power-Saving Policy for DRAM Memories

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Euromicro Symposium on Digital System Design

作者： Gervin Thomas Karthik Chandrasekar Benny Åkesson Ben Juurlink Kees Goossens Department of Computer Engineering and Microelectronics Embedded Systems Architecture Technische Universität Berlin Berlin Germany Department of Computer Engineering Technische Universiteit Delft Delft Netherlands Department of Electrical Engineering Electronic Systems Technische Universiteit Eindhoven Eindhoven Netherlands

关键词： Random access memory History Clocks Energy consumption Prediction algorithms Memory management Servers

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A multi-lead ECG classification based on random projection features

A multi-lead ECG classification based on random projection f...

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International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： Iva Bogdanova Francisco Rincón David Atienza Embedded Systems Laboratory (ESL) Ecole Polytechnique Fédérale de Lausanne Switzerland Department of Computer Architecture and Automation Complutense University of Madrid Spain

This paper presents a novel method for classification of multi-lead electrocardiogram (ECG) signals. The feature extraction is based on the random projection (RP) concept for dimensionality reduction. Furthermore, the classification is performed by a neuro-fuzzy classifier. Such a model can be easily implemented on portable systems for practical applications in both health monitoring and diagnostic purposes. Moreover, the RP implementation on portable systems is very challenging featuring both energy efficiency and feasibility. The proposed method is tested on a 12-lead ECG database consisting of 20 beats during normal sinus rhythm, 20 beats with myocardial infarction and 20 beats showing cardiomyopathy for 60 different subjects. The experiments give a recognition rate of 100% for a small number of RP coefficients (only 25), i.e. after a considerable dimensionality reduction of the input ECG signal. The results are very promising, not only from the classification performance point of view, but also while targeting a low-complexity feature extraction in terms of computation requirements and memory usage for real-time operation on a wireless wearable sensor platform.

关键词： Electrocardiography Feature extraction Databases Pragmatics Wireless sensor networks Wireless communication computer architecture

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Adaptive resource allocation for streaming applications

Adaptive resource allocation for streaming applications

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2011 11th International Conference on embedded computer systems: architectures, Modeling and Simulation, IC-SAMOS 2011

作者： Ter Braak, Timon D. Toersche, Hermen A. Kokkeler, André B.J. Smit, Gerard J.M. Computer Architecture for Embedded Systems Group Department of Electrical Engineering Mathematics and Computer Science University of Twente P.O. Box 217 7500 AE Enschede Netherlands

ISBN: (纸本)9781457708008

Streaming applications often have latency and throughput requirements due to timing critical signal processing, or the time critical interaction with their environment. Mapping such applications to a multi-core architecture is commonly done at design-time to be able to analyze the complex design-space. However, such design-flows cannot deal with a dynamic platform or a dynamic set of applications. Hardware faults and resources claimed by other applications may render the assumed available resources inaccessible. To avoid the assumptions posed on the state of the platform by a fixed resource allocation, applications should be designed with location transparency in mind. Applications must be analyzed at design-time to determine the required resource budget, independent of which specific resources will be allocated. Sufficient performance can be guaranteed when such applications are mapped onto an architecture in which each resource is arbitrated using a budget scheduler. Within the Cutting edge Reconfigurable ICs for Stream Processing (CRISP) project, a many-core platform is developed that adheres to these requirements. Using the configuration features of the platform, the system is able to control at run-time what resources are being used by the applications. This paper shows that run-time resource allocation can effectively adapt to the available set of resources, providing partial distribution transparency to the user. As an example, a GNSS receiver is mapped to the platform containing faulty hardware components. A few resources remain critical, but in most cases the faulty components can be circumvented, such that adequate resources can be allocated to the application at run-time. © 2011 IEEE.

关键词： Budget control

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Multi-domain transformational design flow for embedded systems

Multi-domain transformational design flow for embedded syste...

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2011 11th International Conference on embedded computer systems: architectures, Modeling and Simulation, IC-SAMOS 2011

作者： Rovers, Kenneth C. Van De Burgwal, Marcel D. Kuper, Jan Kokkeler, André B.J. Smit, Gerard J. M. Computer Architecture for Embedded Systems Group Department of EEMCS CTIT University of Twente P.O. Box 217 7500 AE Enschede Netherlands

ISBN: (纸本)9781457708008

Current tools for embedded system design have limited support for modelling the interaction of the system with its physical environment. Furthermore, the natural representation of (streaming, real-time) applications with dataflow models is not supported by most tools. However, integrating multiple domains supports the design of complex interdisciplinary systems and enables model transformations. In this paper we discuss a unified approach, called UniTi, to handle continuous and discrete time models in a single framework, which includes the dataflow model as well. Our approach consists of a transformational design flow, expressed mathematically in a functional language. We formally distinguish the various domains and explain their interaction. In addition, we give guidelines for specifying algorithms such that these transformations can be applied. Our approach is illustrated with a non-trivial case study: beamforming in a phased array system. © 2011 IEEE.

关键词： embedded systems

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Multi-domain transformational design flow for embedded systems

Multi-domain transformational design flow for embedded syste...

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International Conference on embedded computer systems: architectures, Modeling and Simulation (IC-SAMOS)

作者： Kenneth C. Rovers Marcel D. van de Burgwal Jan Kuper André B. J. Kokkeler Gerard J. M. Smit Computer Architecture for Embedded Systems group CTIT Department of EEMCS University of Twente Enschede Netherlands

关键词： Mathematical model Hardware Parallel processing computer architecture embedded systems Delay

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Adaptive resource allocation for streaming applications

Adaptive resource allocation for streaming applications

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International Conference on embedded computer systems: architectures, Modeling and Simulation (IC-SAMOS)

作者： Timon D. ter Braak Hermen A. Toersche André B. J. Kokkeler Gerard J. M. Smit Computer Architecture for Embedded Systems Group Department of Electrical Engineering Mathematics and Computer Science University of Twente Enschede Netherlands

关键词： Hardware Routing Resource management Global Navigation Satellite systems Receivers Tiles Radio frequency

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Towards safe data flow processing by integration of design by contract in deterministic UML activities

Towards safe data flow processing by integration of design b...

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XXII International Symposium on Information, Communication and Automation Technologies, ICAT

作者： Zamira Daw Marcus Vetter Josef Boercsoek Institute of Embedded Systems Hochschule Mannheim-University of Applied Sciences Mannheim Germany Department of Computer Architecture and System Programming University of Kassel Kassel Germany

Data flow processing is a common task of embedded systems which is usually modeled as a pipeline. Errors in a block of this pipeline can be propagated through it thus leading to unexpected and erroneous behaviors. For safety related applications, this pipeline has to be able to identify and react to failures. The DMOSES model-driven development method uses deterministic UML activities to describe and implement data flow processing. This method ensures deterministic behavior of concurrent processing. Design by Contract defines formal, precise and verifiable interfaces for software components. We propose a development method for safe data flow processing based on the integration of this concept in deterministic UML activities. This integration allows the identification of errors by detection of contracts violation. This paper presents an extension of the DMOSES tool for contracts verification at the model level and their monitoring at runtime.

关键词： Unified modeling language Contracts Monitoring embedded systems Object oriented modeling Safety Pins

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C?aSH: Structural Descriptions of Synchronous Hardware Using Haskell

C?aSH: Structural Descriptions of Synchronous Hardware Using...

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Euromicro Symposium on Digital System Design

作者： Christiaan Baaij Matthijs Kooijman Jan Kuper Arjan Boeijink Marco Gerards Computer Architecture for Embedded Systems (CAES) Department of EEMCS University of Twente Enschede Netherlands

CλaSH is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. Polymorphism and higher-order functions provide a level of abstraction and generality that allow a circuit designer to describe circuits in a more natural way than possible with the language elements found in the traditional hardware description languages. Circuit descriptions can be translated to synthesizable VHDL using the prototype CλaSH compiler. As the circuit descriptions, simulation code, and test input are also valid Haskell, complete simulations can be done by a Haskell compiler or interpreter, allowing high-speed simulation and analysis.

关键词： Hardware Integrated circuit modeling Pattern matching Hardware design languages Multiplexing Prototypes Radiation detectors

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