检索结果-内蒙古大学图书馆

HyperPart: A Hypergraph-Based Abstraction for Deduplicated Storage Systems

IEEE TRANSACTIONS ON CLOUD COMPUTING 2025年第1期13卷 46-60页

作者： Cheng, Geyao Xia, Junxu Luo, Lailong Mi, Haibo Guo, Deke Ma, Richard T. B. Natl Univ Def Technol Coll Informat & Commun State Key Lab Complex & Crit Software Environm Wuhan 430019 Peoples R China Natl Univ Def Technol Natl Key Lab Informat Syst Engn Changsha 410073 Peoples R China Natl Univ Def Technol Natl Lab Parallel & Distributed Proc Changsha 410073 Peoples R China Natl Univ Singapore Sch Comp Singapore 119077 Singapore

Currently, deduplication techniques are utilized to minimize the space overhead by deleting redundant data blocks across large-scale servers in data centers. However, such a process exacerbates the fragmentation of data blocks, causing more cross-server file retrievals with plummeting retrieval throughput. Some attempts prefer better file retrieval performance by confining all blocks of a file to one single server, resulting in non-trivial space consumption for more replicated blocks across servers. An ideal network storage system, in effect, should take both the deduplication and retrieval performance into account by implementing reasonable assignment of the detected unique blocks. Such a fine-grained assignment requires an accurate and comprehensive abstraction of the files, blocks, and the file-block affiliation relationships. To achieve this, we innovatively design the weighted hypergraph to profile the multivariate data correlations. With this delicate abstraction in place, we propose HyperPart, which elegantly transforms this complex block allocation problem into a hypergraph partition problem. For more general scenarios with dynamic file updates, we further propose a two-phase incremental hypergraph repartition scheme, which mitigates the performance degradation with minimal migration volume. We implement a prototype system of HyperPart, and the experiment results validate that it saves around 50% of the storage space and improves the retrieval throughput by approximately 30% of state-of-the-art methods under the balance constraints.

关键词： Servers Fingerprint recognition Throughput Metadata Resource management Switches Data centers Indexing Ethernet Correlation Network storage systems data deduplication hypergraph partition

来源：评论

学校读者我要写书评

暂无评论

Advancing RFID Technology for Virtual Boundary Detection

引用

IEEE TRANSACTIONS ON MOBILE COMPUTING 2025年第4期24卷 3407-3422页

作者： Li, Xiaoyu Liu, Jia Lin, Zihao Liu, Xuan Wang, Yanyan Zhang, Shigeng Ye, Baoliu Nanjing Univ State Key Lab Novel Software Technol Nanjing 210023 Peoples R China Hunan Univ Coll Comp Sci & Elect Engn Changsha 410082 Peoples R China Hohai Univ Coll Comp & Informat Nanjing 210024 Peoples R China Cent South Univ Sch Comp Sci & Engn Sci & Technol Parallel & Distributed Proc Lab PDL Changsha 410017 Peoples R China

A boundary is a physical or virtual line that marks the edge or limit of a specific region, which has been widely used in many applications, such as autonomous driving, virtual wall, and robotic lawn mowers. However, none of existing work can well balance the deployability and the scalability of a boundary. In this paper, we propose a brand new RFID-based virtual boundary scheme together with its detection algorithm called RF-Boundary, which has the competitive advantages of being battery-free and easy-to-maintain. We develop two technologies of phase gradient and dual-antenna AoA to address the key challenges posed by RF-boundary, in terms of lack of calibration information and multi-edge interference. Besides, we consider the presence of multipath in the real world applications, model the effect on signals in the dynamic scenarios, and demonstrate the robustness of our phase gradient-based scheme under multipath. We implement a prototype of RF-Boundary with commercial RFID systems and a mobile robot. Extensive experiments verify the feasibility as well as the good performance of RF-Boundary, with a mean detection error of only 8.6 cm.

关键词： Image edge detection Robots Radiofrequency identification Calibration Mobile computing Radio frequency Robot sensing systems Location awareness Interference Wire Boundary detection Internet of Things RFID virtual boundary

来源：评论

学校读者我要写书评

暂无评论

A high-performance matrix transposition for a new MIMD architecture processor PEZY-SC3s

引用

CCF TRANSACTIONS ON HIGH PERFORMANCE COMPUTING 2025年 1-13页

作者： Liang, Yaling Wang, Qinglin Yang, Shun Xia, Rui Guo, Weihao Liu, Jie Natl Univ Def Technol Natl Key Lab Parallel & Distributed Comp Changsha 410073 Peoples R China Natl Univ Def Technol Lab Digitizing Software Frontier Equipment Changsha 410073 Peoples R China Natl Univ Def Technol Coll Comp Changsha 410073 Peoples R China

Matrix transposition is a vital kernel widely used in various fields. However, its memory-intensive nature leads to significant memory access conflicts, making it a performance bottleneck. Therefore, optimizing matrix transposition algorithms based on architectural features is crucial for improving the performance of related applications and enhancing system resource utilization. The PEZY-SC3s, a new MIMD (Multiple Instruction Multiple Data) architecture processor, possesses numerous cores and supports SIMD instructions, demonstrating tremendous potential for high-performance computing. However, no matrix transposition algorithm currently exists tailored to the PEZY-SC3s architecture to leverage its computing potential fully. We propose a high-performance matrix transposition algorithm for PEZY-SC3s. First, we block the matrix according to the cache architecture at the microkernel level to improve the memory access pattern. Then, we separate read and write operations by utilizing the PEZY-SC3s' Local Memory, solving the cache line contention. Finally, we design various processor-level parallel strategies and implement a dynamic selection strategy based on a performance heuristic algorithm for different matrix shapes, alleviating bank conflict and enhancing performance. Experimental results show that our implementation achieves an average speedup of 17.27 times across 60 matrices compared to the baseline algorithm, with a maximum bandwidth utilization of 87.7%.

关键词： Matrix transposition MIMD parallel algorithm PEZY-SC3s

来源：评论

学校读者我要写书评

暂无评论

Faster and Stronger: Unleashing Data Processing Potential Through Hardware Heterogeneity

引用

IEEE INTERNET OF THINGS JOURNAL 2025年第10期12卷 14559-14576页

作者： Wang, Cong Luo, Yang Du, Wenzhuo Wang, Ke Gu, Naijie Yu, Jun Huawei Technol Co Ltd Distributed & Parallel Software Lab 2012 Labs Shenzhen 518100 Peoples R China Univ Sci & Technol China Dept Comp Sci & Technol Hefei 230052 Anhui Peoples R China Univ Sci & Technol China Inst Adv Technol Hefei 230052 Anhui Peoples R China Univ Sci & Technol China Dept Automat Hefei 230052 Anhui Peoples R China

With the rapid advancement of AI technology, there has been a substantial surge in the need for computational resources. Particularly in deep learning, machine learning, and large-scale data analysis, the processing of extensive datasets necessitates exceptionally high levels of computational efficacy and speed. Conventional homogeneous computing platforms, predominantly reliant on central processing units (CPUs), have encountered challenges in meeting the escalating demands for high-performance computing. Consequently, this study advocates for heterogeneous hardware acceleration technology, strategically migrating data operations from CPU to varied hardware components [e.g., graphics processing unit (GPU), neural processing unit (NPU)] to enhance processing efficiency and computational performance during the data preprocessing phase. We conducted experiments to evaluate the impact of utilizing hardware heterogeneous acceleration technologies on data processing speed under various workloads and system hardware configurations. By adjusting parameters like batch size and CPU utilization rates, we compared the performance of frameworks that support hardware heterogeneity with popular deep learning frameworks (e.g., PyTorch and TensorFlow) across various hardware configurations and neural network models. Empirical findings demonstrate that the system framework optimized through heterogeneous hardware acceleration technology (the preprocessing speed is improved in all the given experimental environment tests) exhibits commendable universality and superiority in performance. Codes are available at https://***/mindspore-ai/mindspore.

关键词： Data processing Training Artificial intelligence Data preprocessing Computational modeling Hardware acceleration Data models Graphics processing units Central Processing Unit Tensors hardware heterogeneous acceleration load balancing machine learning performance optimization

来源：评论

学校读者我要写书评

暂无评论

Many Faces of Ad Hoc Transactions

引用

COMMUNICATIONS OF THE ACM 2025年第4期68卷 71-80页

作者： Tang, Chuzhe Wang, Zhaoguo Zhang, Xiaodong Yu, Qianmian Zang, Binyu Guan, Haibing Chen, Haibo Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai Peoples R China Shanghai Jiao Tong Univ Shanghai Peoples R China Minist Educ Engn Res Ctr Domain Specif Operating Syst Shanghai Peoples R China Shanghai Key Lab Scalable Comp & Syst Shanghai Peoples R China Chinese Acad Sci Key Lab Syst Software Beijing Peoples R China

Transactions are the fundamental database abstraction for ensuring application correctness under concurrency and failures. Using database transactions, developers are only tasked with demarcating critical business logic into transactions, and the underlying database system is responsible for coordinating their execution. Yet, in today's Web applications, transactions are often constructed in an ad hoc manner. That is, developers might explicitly use locking primitives or manual validation to coordinate critical code fragments, instead of relying on database transactions. We refer to such application-coordinated transactions as ad hoc transactions. This paper presents the first comprehensive study on ad hoc transactions. Examining 91 ad hoc transaction instances taken from eight popular open source Web applications, we find that (i) every application studied uses ad hoc transactions (up to 16 per application), 71 of which play critical roles;(ii) compared with database transactions, coordination strategies of ad hoc transactions is much more flexible;(iii) ad hoc transactions are errorprone-53 of them have correctness issues, and 33 of them are confirmed by developers;and (iv) ad hoc transactions have the potential to improve performance in contentious workloads by utilizing application semantics such as access patterns. Finally, this paper concludes with a discussion about the implications of ad hoc transactions and opportunities for future research.

关键词： Database systems

来源：评论

学校读者我要写书评

暂无评论

A physics-informed neural network-based aerodynamic parameter identification method for aircraft

引用

PHYSICS OF FLUIDS 2025年第2期37卷

作者： Lin, Jie Chen, Shu-sheng Yang, Hua Jiang, Quan-feng Liu, Jie Natl Univ Def Technol Lab Digitizing Software Frontier Equipment Changsha 410073 Hunan Peoples R China Natl Univ Def Technol Natl Key Lab Parallel & Distributed Comp Changsha 410073 Hunan Peoples R China China Aerodynam Res & Dev Ctr Computat Aerodynam Inst Mianyang 621000 Sichuan Peoples R China Northwestern Polytech Univ Sch Aeronaut Xian 710072 Shaanxi Peoples R China Natl Key Lab Aircraft Configurat Design Xian 710072 Shaanxi Peoples R China

The precise identification of aerodynamic parameters for aircraft is increasingly critical in aircraft design endeavors, particularly for furnishing accurate dynamic models for ground and flight simulation. To mitigate the dependence on traditional identification methods that rely heavily on aircraft models, this work introduces an aerodynamic parameters identification methodology based on Physics-informed Neural Networks (PINNs). By utilizing the six degrees of freedom motion equation as the physical constraint with the neural network, and the aerodynamic parameters to be identified as the neural network variables, the neural network model is trained to serve as a surrogate for the aircraft model. As a case study, the longitudinal motion of the aircraft is employed to identify and analyze the aerodynamic parameters. A comprehensive comparison is conducted among a method based on the genetic algorithm, a conventional neural network-based approach, and the proposed PINN-based methodology. The results obtained demonstrate that the proposed method can effectively mitigate system and data errors, exhibiting high precision in parameter identification and anti-interference capabilities with regard to noise in data. This innovative approach holds the potential to substantially decrease the reliance on flight test data for parameter identification purposes.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Research on application of heterogeneous resonance Integral for double heterogeneous system

引用

ANNALS OF NUCLEAR ENERGY 2025年 212卷

作者： Qin, Shuai Zhang, Qian Wang, Kai Huang, Dong Li, Song Liang, Yuechao Zhejiang Univ Zhejiang Inst Modern Phys Sch Phys Lab Adv Nucl Energy Theory & Applicat Hangzhou 310027 Zhejiang Peoples R China Xi An Jiao Tong Univ Sch Elect Engn 28 Xianning West Rd Xian 710049 Shaanxi Peoples R China Naval Univ Engn Coll Nucl Sci & Technol Wuhan Peoples R China Natl Univ Def Technol Lab Digitizing Software Frontier Equipment Changsha 410073 Hunan Peoples R China Natl Univ Def Technol Key Lab Parallel & Distributed Comp Changsha 410073 Hunan Peoples R China

The Double Heterogeneous (DH) system, where fuel particles are randomly dispersed in the non-fissile matrix, is challenging for the reactor physics calculation. The Sanchez-Pomraning method accurately handles the DH system, but integrating it into existing reactor physics code requires code development. This study adopts the Sanchez-Pomraning coupled Ultra-Fine-Group (SP-UFG) slowing-down calculation to generate the heterogeneous Resonance Integral (RI) for DH system treatment with simple volume homogenization. Fully Ceramic Microencapsulated (FCM) fuel pin-cells and plates with varying configurations are calculated for verification. Effective cross-sections (XSs) and keff calculated by the heterogeneous RI are compared with SP-UFG results. Results show that the maximum bias of XSs and keff caused by the XS biases are less than 5% and 200 pcm, respectively. The maximum bias of keff when compared with Monte Carlo calculated results is -213 pcm, demonstrating that only considering the DH effect in the resonance energy region is acceptable.

关键词： Double heterogeneous Heterogeneous resonance integral Sanchez-Pomraning method Ultra-fine-group Subgroup parameter

来源：评论

学校读者我要写书评

暂无评论

TFS: Revisiting Temporal Language Grounding from Frequency Spiking Perspective

TFS: Revisiting Temporal Language Grounding from Frequency S...

引用

International Conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： Yifan Lyu Hongzhou Wu Lixiang Liu Chuxiong Sun Institute of Software Chinese Academy of Sciences University of Chinese Academy of Sciences Beijing China Parallel and Distributed Processing Lab National University of Defense Technology Changsha China Institute of Software Chinese Academy of Sciences Beijing China

ISBN: (数字)9798350368741

ISBN: (纸本)9798350368758

Temporal Language Grounding (TLG) aims to localize moments in untrimmed videos that are most relevant to natural language queries. While existing weakly-supervised methods have achieved significant success in exploring cross-modal relationships, they still face a critical bottleneck: the interference of task-irrelevant information in query embeddings. To address this issue, we propose TLG Frequency Spiking (TFS), a dimensional mask derived from the frequency domain that models the varying importance specific to different queries. By enhancing the understanding of queries, TFS effectively optimizes the cross-modal alignment of visual and textual modalities. Experimental results show that TFS significantly outperforms state-of-the-art baselines on both the Charades-STA and ActivityNet-Captions datasets.

关键词： Visualization Grounding Frequency-domain analysis Neural networks Natural languages Interference Signal processing Speech processing Faces Videos

来源：评论

学校读者我要写书评

暂无评论

Fast and scalable in-network lock management using lock fission 24

Fast and scalable in-network lock management using lock fiss...

引用

Proceedings of the 18th USENIX Conference on Operating Systems Design and Implementation

作者： Hanze Zhang Ke Cheng Rong Chen Haibo Chen Institute of Parallel and Distributed Systems SEIEE Shanghai Jiao Tong University and Shanghai AI Laboratory and MoE Key Lab of Artificial Intelligence AI Institute Shanghai Jiao Tong University Institute of Parallel and Distributed Systems SEIEE Shanghai Jiao Tong University and Engineering Research Center for Domain-specific Operating Systems Ministry of Education China Institute of Parallel and Distributed Systems SEIEE Shanghai Jiao Tong University and Shanghai AI Laboratory and Engineering Research Center for Domain-specific Operating Systems Ministry of Education China Institute of Parallel and Distributed Systems SEIEE Shanghai Jiao Tong University and Engineering Research Center for Domain-specific Operating Systems Ministry of Education China and Key Laboratory of System Software (Chinese Academy of Sciences)

ISBN: (纸本)9781939133403

distributed lock services are extensively utilized in distributed systems to serialize concurrent accesses to shared resources. The need for fast and scalable lock services has become more pronounced with decreasing task execution times and expanding dataset scales. However, traditional lock managers, reliant on server CPUs to handle lock requests, experience significant queuing delays in lock grant latency. Advanced network hardware (e.g. programmable switches) presents an avenue to manage locks without queuing delays due to their high packet processing power. Nevertheless, their constrained memory capacity restricts the manageable lock scale, thereby limiting their effect in large-scale *** paper presents FISSLOCK, a fast and scalable distributed lock service that exploits the programmable switch to improve (tail) latency and peak throughput for millions of locks. The key idea behind FISSLOCK is the concept of lock fission, which decouples lock management into grant decision and participant maintenance. FISSLOCK leverages the programmable switch to decide lock grants synchronously and relies on servers to maintain participants (i.e., holders and waiters) asynchronously. By using the programmable switch for routing, FISSLOCK enables on-demand fine-grained lock migration, thereby reducing the lock grant and release delays. FISSLOCK carefully designs and implements grant decision procedure on the programmable switch, supporting over one million locks. Evaluation using various benchmarks and a real-world application shows the efficiency of FISSLOCK. Compared to the state-of-the-art switch-based approach (NetLock), FISSLOCK cuts up to 79.1% (from 43.0%) of median lock grant time in the microbenchmark and improves transaction throughput for TATP and TPC-C by 1.76× and 2.28×, respectively.

关键词：

来源：评论

学校读者我要写书评

暂无评论

GigaE PM: a high performance communication facility using a Gigabit Ethernet

引用

NEW GENERATION COMPUTING 2000年第2期18卷 177-186页

作者： Sumimoto, S Tezuka, H Hori, A Harada, H Takahashi, T Ishikawa, Y Real World Comp Partnership Parallel & Distributed Syst Software Lab Tsukuba Ibaraki 3050032 Japan

A high performance communication facility, called the GigaE PM, has been designed and implemented for parallel applications on clusters of computers using a Gigabit Ethernet. The GigaE PM provides not only a reliable high bandwidth and low latency communication, but also supports existing network protocols such as TCP/IP. A reliable communication mechanism for a parallel application is implemented on the firmware on a NIC while existing network protocols are handled by an operating system kernel. A prototype system has been implemented using an Essential Communications Gigabit Ethernet card. The performance results show that a 58.3 mu s round trip time for a four byte user message, Emd 56.7 MBytes/sec bandwidth for a 1,468 byte message have been achieved on Intel Pentium II 400 MHz PCs. We have implemented MPICH-PM on top of the GigaE PM, and evaluated the NAS parallel benchmark performance. The results show that the IS class S performance on the GigaE PM is 1.8 times faster than that on TCP/IP.

关键词： distributed and paralell computing high performance communication Gigabit Ethernet commodity network

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：