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A hybrid memory architecture supporting fine-grained data migration

Frontiers of Computer Science 2024年第2期18卷 31-41页

作者： Ye CHI Jianhui YUE Xiaofei LIAO Haikun LIU Hai JIN National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China Department of Computer Science Michigan Technological UniversityMichigan 49931USA

Hybrid memory systems composed of dynamic random access memory(DRAM)and Non-volatile memory(NVM)often exploit page migration technologies to fully take the advantages of different memory *** previous proposals usually migrate data at a granularity of 4 KB pages,and thus waste memory bandwidth and DRAM *** this paper,we propose Mocha,a non-hierarchical architecture that organizes DRAM and NVM in a flat address space physically,but manages them in a cache/memory *** the commercial NVM device-Intel Optane DC Persistent Memory Modules(DCPMM)actually access the physical media at a granularity of 256 bytes(an Optane block),we manage the DRAM cache at the 256-byte size to adapt to this feature of *** design not only enables fine-grained data migration and management for the DRAM cache,but also avoids write amplification for Intel Optane *** also create an Indirect Address Cache(IAC)in Hybrid Memory Controller(HMC)and propose a reverse address mapping table in the DRAM to speed up address translation and cache ***,we exploit a utility-based caching mechanism to filter cold blocks in the NVM,and further improve the efficiency of the DRAM *** implement Mocha in an architectural *** results show that Mocha can improve application performance by 8.2%on average(up to 24.6%),reduce 6.9%energy consumption and 25.9%data migration traffic on average,compared with a typical hybrid memory architecture-HSCC.

关键词： non-volatile memory hybrid memory system data migration fine-grained caching

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Minimal Context-Switching data Race Detection with dataflow Tracking

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Journal of Computer Science & technology 2024年第1期39卷 211-226页

作者：郑龙李洋辛杰刘海峰郑然廖小飞金海 National Engineering Research Center for Big Data Technology and System School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China Services Computing Technology and System Laboratory School of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China Cluster and Grid Computing Laboratory School of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China

data race is one of the most important concurrent anomalies in multi-threaded *** con-straint-based techniques are leveraged into race detection,which is able to find all the races that can be found by any oth-er sound race ***,this constraint-based approach has serious limitations on helping programmers analyze and understand data ***,it may report a large number of false positives due to the unrecognized dataflow propa-gation of the ***,it recommends a wide range of thread context switches to schedule the reported race(in-cluding the false one)whenever this race is exposed during the constraint-solving *** ad hoc recommendation imposes too many context switches,which complicates the data race *** address these two limitations in the state-of-the-art constraint-based race detection,this paper proposes DFTracker,an improved constraint-based race detec-tor to recommend each data race with minimal thread context ***,we reduce the false positives by ana-lyzing and tracking the dataflow in the *** this means,DFTracker thus reduces the unnecessary analysis of false race *** further propose a novel algorithm to recommend an effective race schedule with minimal thread con-text switches for each data *** experimental results on the real applications demonstrate that 1)without removing any true data race,DFTracker effectively prunes false positives by 68%in comparison with the state-of-the-art constraint-based race detector;2)DFTracker recommends as low as 2.6-8.3(4.7 on average)thread context switches per data race in the real world,which is 81.6%fewer context switches per data race than the state-of-the-art constraint based race ***,DFTracker can be used as an effective tool to understand the data race for programmers.

关键词： data race satisfiability modulo theory multi-threaded program dynamic detection

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ChestBox: Enabling Fast State Sharing for Stateful Serverless computing with State Functions

IEEE Transactions on Sustainable Computing

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IEEE Transactions on Sustainable computing 2024年第3期10卷 491-502页

作者： Zhang, Xinmin Wu, Song Gu, Lin He, Qiang Jin, Hai Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Wuhan Hubei430074 China

This paper presents ChestBox, a novel approach that utilizes state functions to facilitate low-latency state sharing for stateful serverless computing. When an application function needs to share a state, the state function creates a memory space with Linux's shared memory object to store the state. Other application functions can then read the state directly from the shared memory. ChestBox enables fast state sharing that avoids excessive memory overhead without compromising on-demand resource allocation compared to existing solutions. This effectively reduces the energy consumption of serverless computing and promotes sustainable computing. The implementation of ChestBox on Apache OpenWhisk unearths two major implementation challenges, which we address with respective optimization techniques, i.e., state function channel and state swapping. The evaluation of ChestBox with four real-world applications shows that compared with the state-of-The-Art approach, it can reduce state-sharing latency by up to 99.71%, while reducing execution costs by 24.59% and storage costs by 99.76%. © 2016 IEEE.

关键词： Storage allocation (computer)

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Correcting Pronoun Homophones with Subtle Semantics in Chinese Speech Recognition 30

Correcting Pronoun Homophones with Subtle Semantics in Chine...

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Joint 30th International Conference on Computational Linguistics and 14th International Conference on Language Resources and Evaluation, LREC-COLING 2024

作者： Zhang, Zhaobo Gan, Rui Yuan, Pingpeng Jin, Hai National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Laboratory Cluster and Grid Computing Laboratory Huazhong University of Science and Technology Wuhan China

ISBN: (纸本)9782493814104

Speech recognition is becoming prevalent in daily life. However, due to the similar semantic context of the entities and the overlap of Chinese pronunciation, the pronoun homophone, especially "他/她/它 (he/she/it)", (their pronunciation is "Tā") is usually recognized incorrectly. It poses a challenge to automatically correct them during the post-processing of Chinese speech recognition. In this paper, we propose three models to address the common confusion issues in this domain, tailored to various application scenarios. We implement the language model, the LSTM model with semantic features, and the rule-based assisted Ngram model, enabling our models to adapt to a wide range of requirements, from high-precision to low-resource offline devices. The extensive experiments show that our models achieve the highest recognition rate for "Tā" correction with improvements from 70% in the popular voice input methods up to 90%. Further ablation analysis underscores the effectiveness of our models in enhancing recognition accuracy. Therefore, our models improve the overall experience of Chinese speech recognition of "Tā" and reduce the burden of manual transcription corrections. © 2024 ELRA Language Resource Association: CC BY-NC 4.0.

关键词： Speech recognition

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Multi-Dimensional Training Optimization for Efficient Federated Synergy Learning

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IEEE Transactions on Mobile computing 2025年第7期24卷 6243-6258页

作者： Fu, Shucun Dong, Fang Chen, Runze Shen, Dian Zhang, Jinghui He, Qiang Southeast University School of Computer Science and Engineering Nanjing China Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Wuhan China

Edge learning (EL) is an end-to-edge collaborative learning paradigm enabling devices to participate in model training and data analysis, opening countless opportunities for edge intelligence. As a promising EL framework, federated synergy learning (FSyL) mitigates the computation and communication overhead on resource-constrained devices by offloading partial model layers to the edge server for synergistic training. Nevertheless, due to the system and statistical heterogeneity, naively using existing FSyL methods is significantly time-consuming and causes accuracy degradation. Motivated by this issue, this paper introduces a novel FSyL framework that integrates multi-dimensional training optimization and formulates the edge learning cost minimization (ELCM) problem. To tackle the ELCM efficiently, we design OL-MG, an OnLine Model Splitting and Resource Provisioning Game. Specifically, we first reformulate and decompose the original ELCM based on data quality evaluation. Then, given a model splitting decision, we determine the optimal resource provisioning in Sub-problem1, based on which optimal model splitting in Sub-problem2 is modeled as a potential game. Subsequently, we introduce a decentralized algorithm to find a Nash equilibrium (NE) solution. Furthermore, we further extend OL-MG to support a budget-aware multi-edge scenario. Extensive experiments demonstrate that the proposed mechanism significantly outperforms state-of-the-art methods in cost-saving and accuracy improvement. © 2025 IEEE.

关键词： Federated learning

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Evaluating RISC-V Vector Instruction Set Architecture Extension with Computer Vision Workloads

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Journal of Computer Science & technology 2023年第4期38卷 807-820页

作者：李若时彭平邵志远金海郑然 National Engineering Research Center for Big Data Technology and System Huazhong University of Science and Technology Wuhan 430074China Services Computing Technology and System Laboratory Huazhong University of Science and TechnologyWuhan 430074 China Cluster and Grid Computing Lab Huazhong University of Science and TechnologyWuhan 430074China

Computer vision(CV)algorithms have been extensively used for a myriad of applications *** the multimedia data are generally well-formatted and regular,it is beneficial to leverage the massive parallel processing power of the underlying platform to improve the performances of CV *** Instruction Multiple data(SIMD)instructions,capable of conducting the same operation on multiple data items in a single instruction,are extensively employed to improve the efficiency of CV *** this paper,we evaluate the power and effectiveness of RISC-V vector extension(RV-V)on typical CV algorithms,such as Gray Scale,Mean Filter,and Edge *** our examinations,we show that compared with the baseline OpenCV implementation using scalar instructions,the equivalent implementations using the RV-V(version 0.8)can reduce the instruction count of the same CV algorithm up to 24x,when processing the same input ***,the actual performances improvement measured by the cycle counts is highly related with the specific implementation of the underlying RV-V *** our evaluation,by using the vector co-processor(with eight execution lanes)of Xuantie C906,vector-version CV algorithms averagely exhibit up to 2.98x performances speedups compared with their scalar counterparts.

关键词： RISC-V vector extension single instruction multiple data(SIMD) computer vision OpenCV

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Massively parallel algorithms for fully dynamic all-pairs shortest paths

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Frontiers of Computer Science 2024年第4期18卷 201-203页

作者： Chilei WANG Qiang-Sheng HUA Hai JIN Chaodong ZHENG National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China State Key Laboratory for Novel Software Technology Nanjing UniversityNanjing 210023China

1 Introduction In recent years,the Massively Parallel Computation(MPC)model has gained significant ***,most of distributed and parallel graph algorithms in the MPC model are designed for static graphs[1].In fact,the graphs in the real world are constantly *** size of the real-time changes in these graphs is smaller and more *** graph algorithms[2,3]can deal with graph changes more efficiently[4]than the corresponding static graph ***,most studies on dynamic graph algorithms are limited to the single machine ***,a few parallel dynamic graph algorithms(such as the graph connectivity)in the MPC model[5]have been proposed and shown superiority over their parallel static counterparts.

关键词： dynamic shortest gained

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Resource investment for DDoS attack resistant SDN: a practical assessment

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Science China(Information Sciences) 2023年第7期66卷 112-129页

作者： Bin YUAN Fan ZHANG Jun WAN Huan ZHAO Shui YU Deqing ZOU Qiangsheng HUA Hai JIN School of Cyber Science and Engineering Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Hubei Engineering Research Center on Big Data Security Shenzhen Huazhong University of Science and Technology Research Institute School of Computer Science and Technology Huazhong University of Science and Technology Cluster and Grid Computing Lab School of Computer Science University of Technology Sydney

Software-defined networks(SDNs) present a novel network architecture that is widely used in various datacenters. However, SDNs also suffer from many types of security threats, among which a distributed denial of service(DDoS) attack, which aims to drain the resources of SDN switches and controllers,is one of the most common. Once the switch or controller is damaged, the network services can be *** defense schemes against DDoS attacks have been proposed from the perspective of attack detection;however, such defense schemes are known to suffer from a time consuming and unpromising accuracy, which could result in an unavailable network service before specific countermeasures are taken. To address this issue through a systematic investigation, we propose an elaborate resource-management mechanism against DDoS attacks in an SDN. Specifically, by considering the SDN topology, we leverage the M/M/c queuing model to measure the resistance of an SDN to DDoS attacks. Network administrators can therefore invest a reasonable number of resources into SDN switches and SDN controllers to defend against DDoS attacks while guaranteeing the quality of service(QoS). Comprehensive analyses and empirical data-based experiments demonstrate the effectiveness of the proposed approach.

关键词： SDN security DDoS attacks resource management queueing theory QoS

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Towards High-Performance Graph Processing: From a Hardware/Software Co-Design Perspective

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Journal of Computer Science & technology 2024年第2期39卷 245-266页

作者：廖小飞赵文举金海姚鹏程黄禹王庆刚赵进郑龙张宇邵志远 National Engineering Research Center for Big Data Technology and System School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China Services Computing Technology and System Laboratory School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China Cluster and Grid Computing Laboratory School of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China Zhejiang Lab Hangzhou 311121China

Graph processing has been widely used in many scenarios,from scientific computing to artificial *** processing exhibits irregular computational parallelism and random memory accesses,unlike traditional ***,running graph processing workloads on conventional architectures(e.g.,CPUs and GPUs)often shows a significantly low compute-memory ratio with few performance benefits,which can be,in many cases,even slower than a specialized single-thread graph *** domain-specific hardware designs are essential for graph processing,it is still challenging to transform the hardware capability to performance boost without coupled software *** article presents a graph processing ecosystem from hardware to *** start by introducing a series of hardware accelerators as the foundation of this ***,the codesigned parallel graph systems and their distributed techniques are presented to support graph ***,we introduce our efforts on novel graph applications and hardware *** results show that various graph applications can be efficiently accelerated in this graph processing ecosystem.

关键词： graph processing hardware accelerator software system high performance ecosystem

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XGCN:a library for large-scale graph neural network recommendations

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Frontiers of Computer Science 2024年第3期18卷 247-249页

作者： Xiran SONG Hong HUANG Jianxun LIAN Hai JIN National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China Microsoft Research Asia Beijing 100080China

1 Introduction Graph Neural Networks(GNNs)have gained widespread adoption in recommendation systems,and nowadays there is a pressing need to effectively manage large-scale graph data[1].When it comes to large graphs,GNNs may encounter the scalability issue stemming from their multi-layer messagepassing ***,scaling GNNs has emerged as a crucial research area in recent years,with numerous scaling strategies being proposed.

关键词： scaling gained operations

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