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Heterogeneous integration of GaAs pHEMT and Si CMOS on the same chip

Chinese Physics B 2016年第6期25卷 494-499页

作者：吴立枢赵岩沈宏昌张有涛陈堂胜 Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing Electronic Devices Institute

In this work,we demonstrate the technology of wafer-scale transistor-level heterogeneous integration of Ga As pseudomorphic high electron mobility transistors（p HEMTs） and Si complementary metal–oxide semiconductor（CMOS） on the same Silicon *** As p HEMTs are vertical stacked at the top of the Si CMOS wafer using a wafer bonding technique,and the best alignment accuracy of 5 μm is *** a circuit example,a wide band Ga As digital controlled switch is fabricated,which features the technologies of a digital control circuit in Si CMOS and a switch circuit in Ga As p HEMT,15% smaller than the area of normal Ga As and Si CMOS circuits.

关键词： Si CMOS GaAs pHEMT heterogeneous integration benzocyclobutene

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Comparison of spin photocurrent in devices based on in-plane or out-of-plane magnetized CoFeB spin detectors

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Physical Review B 2019年第4期100卷 045417-045417页

作者： Xiaodi Xue Laipan Zhu Wei Huang Xavier Marie Pierre Renucci Yu Liu Yang Zhang Xiaolin Zeng Jing Wu Bo Xu Zhanguo Wang Yonghai Chen Weifeng Zhang Yuan Lu Key Laboratory of Semiconductor Materials Science Institute of Semiconductors Chinese Academy of Sciences Beijing Key Laboratory of Low Dimensional Semiconductor Materials and Devices Beijing 100083 China Henan Key Laboratory of Photovoltaic Materials Laboratory of Low-Dimensional Materials ScienceSchool of Physics & Electronics Henan University Kaifeng 475004 China Beijing Institute of Nanoenergy and Nanosystems Chinese Academy of Sciences Beijing 100083 China Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing Electronic Devices Institute Nanjing 210016 China Université de Toulouse INSA-CNRS-UPS LPCNO135 Avenue de Rangueil F-31077 Toulouse France Center of Materials Science and Optoelectronics Engineering University of Chinese Academy of Sciences Beijing 100049 China Université de Lorraine Institut Jean Lamour UMR CNRS 7198 campus ARTEM 2 Allée André Guinier 54011 Nancy France

We have measured a helicity-dependent photocurrent at zero external magnetic field in a device based on a semiconductor quantum well embedded in a p-i-n junction. The device is excited under vertical incidence with circularly polarized light. The spin filtering effect is evidenced in the temperature range 77–300 K owing to a CoFeB/MgO spin filter with out-of-plane magnetization in remanence. The helicity-dependent photocurrent is explored as a function of the temperature and bias. These characteristics are compared with those of a spin photocurrent device with in-plane magnetized CoFeB/MgO spin filter, excited under oblique incidence with circularly polarized light. In contrast to the in-plane spin filter device, the circularly polarized light asymmetry of the photocurrent in the out-of-plane device depends weakly on the external bias. The two devices are sensitive to the spin filtering of either the in-plane (Sx) or out-of-plane (Sz) photogenerated electron spin in the semiconductor quantum well. The helicity-dependent photocurrent results can be explained by the Dyakonov-Perel electron spin-relaxation mechanism. Our study reveals the giant spin relaxation anisotropy in III-V zinc-blende quantum wells in the presence of a vertical electric field.

关键词： Polarization of light Spin filtering Spin relaxation Spintronics Ferromagnets Quantum wells Femtosecond laser spectroscopy

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Research on failure analysis and method of GaN-based HEMTs 14

Research on failure analysis and method of GaN-based HEMTs

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14th China International Forum on Solid State Lighting: International Forum on Wide Bandgap Semiconductors China, SSLChina: IFWS 2017

作者： Yan-Fang, Chen Wei-Ling, Guo Yan-Xu, Zhu Jian-Jun, Zhou Liang, Lei Chang-Qing, Bai Key Laboratory of Optoelectronics Technology Ministry of Education Beijing University of Technology Beijing100124 China Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing Electronic Devices Institute Nanjing210016 China

ISBN: (纸本)9781538648513

The reliability of GaN-based high electron mobility transistors (HEMTs) is of great importance due to the special characteristics of AlGaN/GaN heterostructure such as intense polarization effect, high material defect density, strong electric field working condition, complicated process etc. Failure analysis is the premise and foundation to improve reliability of semiconductor devices. However, there is less research on failure analysis method about HEMTs at present. In this paper, an effective method of failure analysis of HEMT is presented to analyze the failure reason of electrical stress on many occasions, and a corresponding case analysis of HEMT is carried out. Following the unique complementary detection process of electrical testing, thermal radiation and photon emission, device failure position can be determined rapidly and failure mode and mechanism can be analyzed by this method. A 4-finger GaN-based HEMT with a operating voltage of 28V and a gate width of 1.25mm are analyzed according to this failure analysis method. Two failure positions were localized and the failure mode and mechanism were determined by comprehensive analysis of testing images and data. Finally, several improvements in design and process of GaN-based HEMTs are proposed, which is a valuable reference on the failure analysis and reliability enhancement of HEMT devices. © 2017 IEEE.

关键词： Gallium nitride

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A High Power 320–356GHz Frequency Multipliers with Schottky Diodes

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Chinese Journal of Electronics 2016年第5期25卷 986-990页

作者： YAO Changfei ZHOU Ming LUO Yunsheng Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing Electronic Devices Institute(NEDI) Department of Microwave and Millimeter Wave Modules NEDI

A 320–356GHz fixed-tuned frequency doubler is realized with discrete Schottky diodes mounted on 50μm thick quartz substrate. Influence of circuit channel width and thermal dissipation of the diode junctions are discussed for high multiplying efficiency. The doubler circuit is flip-chip mounted on gold electroplated oxygenfree copper film for grounding of RF and DC signals, and better thermal transportation. The whole multiplying circuit is optimized and established in Computer simulation technology(CST) suite. The highest measured multiplying efficiency is 8.0% and its output power is 5.4mW at 328 GHz. The measured typical output power is 4.0mW in 320–356GHz.

关键词： Schottky diode Frequency doubler Efficiency Thermal dissipation

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A G-band terahertz monolithic integrated amplifier in 0.5-μm InP double heterojunction bipolar transistor technology

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Chinese Physics B 2016年第5期25卷 448-452页

作者：李欧鹏张勇徐锐敏程伟王元牛斌陆海燕 Fundamental Science on EHF Laboratory University of Electronic Science and Technology of China Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing Electronic Devices Institute

Design and characterization of a G-band（140–220 GHz） terahertz monolithic integrated circuit（TMIC） amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm In Ga As/In P double heterojunction bipolar transistor（DHBT）. An inverted microstrip line is implemented to avoid a parasitic mode between the ground plane and the In P substrate. The on-wafer measurement results show that peak gains are 20 dB at 140 GHz and more than 15-dB gain at 140–190 GHz respectively. The saturation output powers are-2.688 dBm at 210 GHz and-2.88 dBm at 220 GHz,respectively. It is the first report on an amplifier operating at the G-band based on 0.5-μm InP DHBT technology. Compared with the hybrid integrated circuit of vacuum electronic devices, the monolithic integrated circuit has the advantage of reliability and consistency. This TMIC demonstrates the feasibility of the 0.5-μm InGaAs/InP DHBT amplifier in G-band frequencies applications.

关键词： terahertz amplifier InP double heterojunction bipolar transistor inverted microstrip line monolithic integrated circuit

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A 13GS/s One-Bit ADC with 18GHz Analog Bandwith Based on InP DHBT technology 14

A 13GS/s One-Bit ADC with 18GHz Analog Bandwith Based on InP...

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14th IEEE International Conference on Solid-State and integrated Circuit technology, ICSICT 2018

作者： Li, Xiaopeng Wang, Zhigong Zhang, Yi Zhang, Youtao Zhang, Min Institute of RF - OE ICs Southeast University Nanjing210096 China Nanjing GuoBo Electronics Co. Ltd Nanjing210016 China Nanjing Electronic Devices Institute Nanjing210016 China National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology Nanjing210046 China State Key Laboratory of Millimeter Waves Southeast University Nanjing210096 China Post-Doctoral Research Center JiangSu HengXin Technology Co. Ltd Yixing214222 China Science and Technology on Monolithic Intergrated Circuits and Modules Laboratory Nanjing210016 China

ISBN: (纸本)9781538644409

In this paper, an ultra-high-speed ultra-wide-bandwidth one-bit analog-to-digital converter (ADC) is implemented. The chip uses a latched high-sensitivity comparator to achieve one-bit quantization, and an integrated 1:8 demultiplexer to reduce the data rate of the output ports, which is helpful for system applications. The chip is implemented with a 0.7μm InP DHBT process. Measurement results show that the sampling rate of the chip is up to 13GS/s, the analog input bandwidth is greater than 18GHz, the input sensitivity is less than -25dBm, and the power consumption is 1.2W. © 2018 IEEE.

关键词： Indium phosphide

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Integrating high-quality dielectrics with one-nanometer equivalent oxide thickness on two-dimensional electronic devices

arXiv

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arXiv 2019年

作者： Li, Weisheng Zhou, Jian Cai, Songhua Yu, Zhihao Zhang, Jialin Fang, Nan Li, Taotao Wu, Yun Chen, Tangsheng Xie, Xiaoyu Ma, Haibo Yan, Ke Dai, Ningxuan Wu, Xiangjin Zhao, Huijuan Wang, Zixuan He, Daowei Pan, Lijia Shi, Yi Wang, Peng Chen, Wei Nagashio, Kosuke Duan, Xiangfeng Wang, Xinran National Laboratory of Solid State Microstructures School of Electronic Science and Engineering Collaborative Innovation Center of Advanced Microstructures Nanjing University Nanjing210093 China National Laboratory of Solid State Microstructures Jiangsu Key Laboratory of Artificial Functional Materials College of Engineering and Applied Sciences Collaborative Innovation Center of Advanced Microstructures Nanjing University Nanjing210093 China Department of Chemistry National University of Singapore 3 Science Drive 3 117543 Singapore Department of Materials Engineering University of Tokyo Tokyo113-8656 Japan Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing Electronic Device Institute Nanjing210016 China School of Chemistry and Chemical Engineering Nanjing University Nanjing210023 China Department of Chemistry and Biochemistry University of California Los AngelesCA United States

Two-dimensional (2D) semiconductors are widely recognized as attractive channel materials for low-power electronics. However, an unresolved challenge is the integration of high-quality, ultrathin high-κ dielectrics that fully meet the roadmap requirements for low-power applications. With a dangling-bond free surface, the deposition of dielectrics by atomic layer deposition (ALD) on 2D materials is usually characterized with nonuniform nucleation and island formation, producing a highly porous dielectric layer with serious leakage particularly at the small equivalent oxide thickness (EOT) limit. Here, we report the robust ALD of highly uniform high-κ dielectric on 2D semiconductors by using ~0.3 nm-thick exclusively monolayer molecular crystal as seeding layer. Ultrathin dielectrics down to 1 nm EOT is realized on graphene, MoS2 and WSe2, with considerably reduced roughness, density of interface states, leakage current and improved breakdown field compared to prior methods. Taking advantage of the reduced EOT, we demonstrate graphene RF transistors operating at 60 GHz, as well as MoS2 and WSe2 complementary metal-oxide-semiconductor (CMOS) transistors with Vdd =0.8 V and ideal subthreshold swing (SS) of 60 mV/dec, 20 nm-channel-length MoS2 transistors with on/off ratio over 107. These studies highlight that our dielectric integration method is generally applicable for different 2D materials, and compatible with top-down fabrication process on large-area chemical vapor deposited films. Copyright © 2019, The Authors. All rights reserved.

关键词： Atomic layer deposition

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Capacitance-voltage characteristic of Ga- and N-polar AlGaN/GaN HEMTs

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Physica Status Solidi (C) Current Topics in Solid State Physics 2016年第5-6期13卷 317-320页

作者： Peng, Daqing Li, Zhonghui Li, Chuanhao Zhang, Dongguo Li, Liang Dong, Xun Pan, Lei Luo, Weike Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing Electronic Devices Institute Nanjing210016 China

Ga- and N-polar AlGaN/GaN HEMTs were designed and epitaxially grown on Si- and C-face SiC substrates by MOCVD. The Capacitance-voltage characteristics of the two structures were investigated by C-V profile and drift-diffusion simulations. The N-polar structure shows double channels, while the electron concentration in the second channel is one order of magnitude lower than that in the first channel. Energy band diagrams and charge distributions were studied. The second channel is formed in AlN/AlGaN interface with electrons spilling over from the first channel when adequate negative voltage was applied on the schottky contact. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

关键词： Silicon carbide

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Design, fabrication and characterising of 100 W GaN HEMT for Ku-band application

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Journal of Semiconductors 2016年第8期37卷 49-54页

作者：任春江钟世昌李宇超李忠辉孔月婵陈堂胜 Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing Electron Devices InstituteNanjing 210016 China

Ku-band GaN power transistor with output power over 100 W under the pulsed operation mode is pre- sented. A high temperature A1N nucleation together with an Fe doped GaN buffer was introduced for the developed GaN HEMT. The A1GaN/GaN hetero-structure deposited on 3 inch SiC substrate exhibited a 2DEG hall mobility and density of -2100 cm2/（V.s） and 1.0 x 10^13 cm-2, respectively, at room temperature. Dual field plates were introduced to the designed 0.25μm GaN HEMT and the source connected field plate was optimized for minimizing the peak field plate near the drain side of the gate, while maintaining excellent power gain performance for Ku-band application. The load-pull measurement at 14 GHz showed a power density of 5.2 W/mm for the fabricated 400 μm gate periphery GaN HEMT operated at a drain bias of 28 V. A Ku-band internally matched GaN power transistor was developed with two 10.8 mm gate periphery GaN HEMT chips combined. The GaN power transistor exhibited an output power of 102 W at 13.3 GHz and 32 V operating voltage under pulsed operation mode with a pulse width of 100 μs and duty cycle of 10%. The associated power gain and power added efficiency were 9.2 dB and 48%, respectively. To the best of the authors＇ knowledge, the PAE is the highest for Ku-band GaN power transistor with over 100 W output power.

关键词： Ku-band PAE A1GaN/GaN GaN HEMT field plate

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Research of temporary bonding for 3D integrational Microsystem

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Journal of Physics: Conference Series 2018年第1期986卷

作者： G X Shi J Wu K Q Qian J Zhu Nanjing Electronic Devices Institute Nanjing 210016 China Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing 210016 China

Due to the thickness of current interposer must be very small, the thickness of active and passive wafers are no more than 200um, even less than 100um, sometime even less than 50um, So handing the thin wafer is the key problem for 3D stack, in this paper designed and experimented the temporary bonding for 3D stack and substrate thinning, analyzed the result of the experiment, and the foundation for the 3D integration technology in the future.

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