As one of the most dangerous and common software vulnerabilities, null dereference often leads to program crashes. In this chapter we propose a human computation method to detect null dereference in a "frog and b...
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With the popularization of multi-core processors, transaction memory, as a concurrent control mechanism with easy programing and high scalability, has attracted more and more attention. As a result, the reliability pr...
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Reverse skyline is useful for supporting many applications, such as marketing decision, environmental monitoring. Since the uncertainty of data is inherent in many scenarios, there is a need for processing probabilist...
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We present an approach under the framework of abstract interpretation to analyze list-manipulating programs by combining shape and numerical abstractions. The analysis automatically divides a list into non-overlapping...
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ISBN:
(纸本)9781450316569
We present an approach under the framework of abstract interpretation to analyze list-manipulating programs by combining shape and numerical abstractions. The analysis automatically divides a list into non-overlapping list segments according to the reachability property of pointer variables to list nodes. The list nodes in each segment are abstracted by a bit-vector wherein each bit corresponds to a pointer variable and indicates whether the nodes can be reached by that pointer variable. Moreover, for each bit-vector, we introduce an auxiliary integer variable, namely a counter variable, to record the number of nodes in the segment abstracted by that bit-vector. On this basis, we leverage the power of numerical abstractions to discover numerical relations among counter variables, so as to infer relational length properties among list segments. Our approach stands out in its ability to find intricate properties that involve both shape and numerical information, which are important for checking program properties such as memory safety and termination. A prototype is implemented and preliminary experimental results are encouraging. Copyright 2013 ACM.
To reduce the time required to complete the regeneration process of erasure codes, we propose a Tree-structured parallel Regeneration (TPR) scheme for multiple data losses in distributed storage systems. Under the sch...
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To reduce the time required to complete the regeneration process of erasure codes, we propose a Tree-structured parallel Regeneration (TPR) scheme for multiple data losses in distributed storage systems. Under the scheme, two algorithms are proposed for the construction of multiple regeneration trees, namely the edge-disjoint algorithm and edge-sharing algorithm. The edge-disjoint algorithm constructs multiple independent trees, and is simple and appropriate for environments where newcomers and their providers are distributed over a large area and have few intersections. The edge-sharing algorithm constructs multiple trees that compete to utilize the bandwidth, and make a better utilization of the bandwidth, although it needs to measure the available band-width and deal with the bandwidth changes; it is therefore difficult to implement in practical systems. The parallel regeneration for multiple data losses of TPR primarily includes two optimizations: firstly, transferring the data through the bandwidth optimized-paths in a pipe-line manner; secondly, executing data regeneration over multiple trees in parallel. To evaluate the proposal, we implement an event-based simulator and make a detailed comparison with some popular regeneration methods. The quantitative comparison results show that the use of TPR employing either the edge-disjoint algorithm or edge-sharing algorithm reduces the regeneration time significantly.
HOSTA is an in-house high-order CFD software that can simulate complex flows with complex geometries. Large scale high-order CFD simulations using HOSTA require massive HPC resources, thus motivating us to port it ont...
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ISBN:
(纸本)9781479938018
HOSTA is an in-house high-order CFD software that can simulate complex flows with complex geometries. Large scale high-order CFD simulations using HOSTA require massive HPC resources, thus motivating us to port it onto modern GPU accelerated supercomputers like Tianhe-1A. To achieve a greater speedup and fully tap the potential of Tianhe-1A, we collaborate CPU and GPU for HOSTA instead of using a naive GPU-only approach. We present multiple novel techniques to balance the loads between the store-poor GPU and the store-rich CPU, and overlap the collaborative computation and communication as far as possible. Taking CPU and GPU load balance into account, we improve the maximum simulation problem size per Tianhe-1A node for HOSTA by 2.3X, meanwhile the collaborative approach can improve the performance by around 45% compared to the GPU-only approach. Scalability tests show that HOSTA can achieve a parallel efficiency of above 60% on 1024 Tianhe-1A nodes. With our method, we have successfully simulated China's large civil airplane configuration C919 containing 150M grid cells. To our best knowledge, this is the first paper that reports a CPUGPU collaborative high-order accurate aerodynamic simulation result with such a complex grid geometry.
DSP processor can be used to solve the high performance computation problems, which has the characteristics of high computing performance and low power. Matrix multiplication algorithm is the kernel of many scientific...
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DSP processor can be used to solve the high performance computation problems, which has the characteristics of high computing performance and low power. Matrix multiplication algorithm is the kernel of many scientific and technology computation, so it is of importance for theorem and practice. Based on general purpose DSP (GPDSP), a new parallel algorithm for matrix multiplication was proposed. And a peak performance model for matrix multiplication was built. From the peak performance model, an architecture of GPDSP was set up, and the parameter of GPDSP with Tflops was given, which includes the number of pipe-line, the number of SIMD registers, the breadth and latency for the hierarchical memories.
In this paper, we consider novel anycast-based integrated routing protocol (AIRP) to reduce the cost in delay performance of communications in multihop WSNs. Without tight time synchronization or known geographic info...
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High-performance computing (HPC) clusters are currently faced with two major challenges - namely, the dynamic nature of new generation of applications and the heterogeneity of platforms - if they are going to be usefu...
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Static data-race detection is a powerful tool by providing clues for dynamic approaches to only instrument certain memory accesses. However, static data-race analysis suffers from high false positive rate. A key reaso...
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