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International Conference on Electrical and Control Engineering (ICECE)

作者： Xuan Zhu National laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology ChangSha China

The application of memristor in building hardware neural network has accepted widespread interests, and may bring novel opportunities to neural computing. However, due to the limitation of programming precision, the conductance of memristor which represents stored information may deviate from theoretical value, and thus bring error to the neural computing results. In this paper, we analyze the impact of imprecise programming on building hardeware neural network through Monte Carlo simulation on feedback layer model. The results show that the fault-tolerance ability of neural network could well adapt to these errors, which further proves the potential of building neural networks using memristors.

关键词： Memristors Programming Mathematical model Buildings Artificial neural networks Fault tolerance

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Minimizing redundant paths for coding-based IP congestion control

Minimizing redundant paths for coding-based IP congestion co...

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International Conference on Computer sciences and Convergence Information technology (ICCIT)

作者： Yuan Yuan Shengyun Liu Yuxing Peng National Laboratory for Parallel and Distributed Processing College of Computer National University of Defense Technology Changsha China

Network coding brings a new solution for IP congestion control, since more than one buffered packets can be encoded together and removed as a coded packet. This may significantly decrease the packet loss during the congestion, but at the cost of building redundant paths. However, how to minimize the overhead of redundant paths turns out to be a NP-hard problem. In this paper, we propose a novel approximation algorithm called FlowGrouping, which transforms the redundant paths building problem into a limited clique partition problem by increasing edge weights, and can find a good approximate solution within O(n 3 ) computation time.

关键词： Encoding Partitioning algorithms Buildings Merging Approximation methods Network coding IP networks

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TRUSTIE: Design of a Trustworthy Software Production Environment

TRUSTIE: Design of a Trustworthy Software Production Environ...

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IEEE International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom)

作者： Huaimin Wang National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

Internet fundamentally changes the model of software development, the demands of software quality, and the process of software resource sharing. Internet- based environment for trustworthy software production is recognized as a key topic of software engineering in both academic and software industry. In this paper, the concepts and models of trustworthy software are introduced which dominate the design of Trustie environment. Trustie provides trustworthy software components sharing by an evolving software repository, and provides collaborative software development in a customizable development platform powered by a software production line framework. Finally the layered practices of research and application based on Trustie preliminarily demonstrate the effectiveness as well as the promising future of this environment.

关键词： Software Production Collaboration Internet Resource management Software engineering Programming

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Error Detection by Redundant Transaction in Transactional Memory System

Error Detection by Redundant Transaction in Transactional Me...

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International Conference on Networking, Architecture, and Storage (NAS)

作者： Wei Song Jia Jia Yu-xing Peng National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

This paper addresses the issue of error detection in transactional memory, and proposes a new method of error detection based on redundant transaction (EDRT). This method creates a transaction copy for every transaction, and executes both original transactions and transaction copies on adequate processor cores, and achieves error detection by comparing the execution results. EDRT utilizes the data-versioning mechanism of transactional memory to achieve the acquisition of an approximate minimum error detection comparing data set, and the acquisition is transparent and online. At last, this paper validates the EDRT through 5 test programs, including 4 SPLASH-2 benchmarks. The experimental results show that, the average error detecting cost is about 3.68% relative to the whole program, and it's only about 12.07% relative to the transaction parts of the program.

关键词： Instruction sets Fault tolerant systems Hardware Computer architecture Redundancy

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Algorithm for distributed Constraint Optimization Problems with low constraint density

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Ruan Jian Xue Bao/Journal of Software 2011年第4期22卷 625-639页

作者： Ding, Bo Wang, Huai-Min Shi, Dian-Xi Tang, Yang-Bin School of Computer National University of Defense Technology Changsha 410073 China National Key Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha 410073 China

Many challenges in multi-agent coordination can be modeled as distributed Constraint Optimization Problems (DCOPs). Aiming at DCOPs with low constraint density, this paper proposes a distributed algorithm based on the idea of greed and backjumping. In this algorithm, each agent makes decisions according to the greedy principle that the most assignment combinations in the problems with low constraint density occur at a zero cost, and the backjumping mechanism among the agents ensures the success of this algorithm, even when this greedy principle leads to a local optimum. In contrast with the existing mainstream DCOP algorithms, this algorithm can solve problems with low constraint density with fewer messages while keeping the polynomial message length and space complexity. The correctness of the key mechanisms in this algorithm has been proved, and those advantages in performance have been verified by experiments. © 2011 ISCAS.

关键词： Multi agent systems

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Understanding How Non-uniform Distribution of Memory Accesses on Cache Sets Affects the System Performance of Chip Multiprocessors

Understanding How Non-uniform Distribution of Memory Accesse...

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IEEE International Symposium on parallel and distributed processing with Applications Workshops (ISPAW)

作者： Xiaomin Jia Jiang Jiang Xiaoqiang Ni Tianlei Zhao Shubo Qi Guitao Fu Minxuan Zhang National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

Non-uniform distribution of memory accesses across cache sets has been recognized as one of the sources of inefficiency of cache architecture on single-core platform. Several schemes target the problem for performance boost. As chip multiprocessors (CMPs) pick up steam as the mainstream processor design choice, how non-uniform distribution of memory accesses across cache sets affects the cache management of CMPs is becoming an open question. We address the question by presenting several cache management schemes on CMP platforms, aiming at balance the memory access distribution across cache sets on shared caches or private caches. We show that on CMP platforms with multi-programmed workloads: (a) for shared caches, the non-uniform memory access distribution across different cache sets is biased by the fact that multiple applications are running concurrently and sharing the cache capacity. The scheme, which we put forward to make use of the non-uniformity to improve performance on shared caches, is proved to be of little to no benefit or even lead to degradation, (b) for caches that are organized as private caches, direct adaption of a scheme that targets this kind of non-uniformity outperforms the baseline private cache design by 2% on average, (c) however, for a private cache based cache management scheme we proposed, further effort to take advantage of this kind of non-uniformity for performance boost (on top of our proposed scheme) is also proved to be of little to no benefit. Therefore, We draw to the conclusion that on CMP platforms with multiprogrammed workloads, the non-uniform distribution of memory accesses across cache sets is partially circumvented by the interactions between multiple applications. Efforts seeking to make use of the non-uniformity to derive more benefit may end up in vain in CMPs.

关键词： Benchmark testing Throughput Arrays Hidden Markov models Indexes Memory management Protocols

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Semantic web service composition using answer set planning

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International Journal of Advancements in Computing technology 2011年第5期3卷 20-31页

作者： Qian, Jun-Yan Huang, Guo-Wang Zhao, Ling-Zhong National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha 410073 China Department of Computer science and engineering Guilin University of Electronic Technology Guilin 541004 China

This paper presents a method that adapting planning description to bring the semantic information into play for service composition through action language C. It shows how service descriptions can be expressed by preconditions and effects and the action language C provides a richer syntax and semantic for complex service descriptions. We also presents the algorithm of Translating semantic Web service described by OWL-S to action language C. Thanks to the structured description and the powerful expression of C, we only consider the initial Situation and the desired goal ignoring details of transition and planning. At last we use satisfiability planning to solve the planning problem by translating the action language into disjunctive logic program.

关键词： Web services

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Coordinate strip-mining and kernel fusion to lower power consumption on GPU

Coordinate strip-mining and kernel fusion to lower power con...

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Design, Automation and Test in Europe Conference and Exhibition

作者： Guibin Wang National Laboratory of Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha Hunan China

ISBN: (纸本)9781612842080

Although general purpose GPUs have relatively high computing capacity, they also introduce high power consumption compared with general purpose CPUs. Therefore low-power techniques targeted for GPUs will be one of the most hot topics in the future. On the other hand, in several application domains, users are unwilling to sacrifice performance to save power. In this paper, we propose an effective kernel fusion method to reduce the power consumption for GPUs without performance loss. Different from executing multiple kernels serially, the proposed method fuses several kernels into one larger kernel. Owing to the fact that most consecutive kernels in an application have data dependency and could not be fused directly, we split large kernel into multiple slices with strip-mining method, then fuse independent sliced kernels into one kernel. Based on the CUDA programming model, we propose three different kernel fusion implementations, with each one targeting for a special case. Based on the different strip-ming methods, we also propose two fusion mechanisms, which are called invariant-slice fusion and variant-slice fusion. The latter one could be better adapted to the requirements of the kernels to be fused. The experimental results validate that the proposed kernel fusion method could effectively reduce the power consumption for GPU.

关键词： Kernel Energy consumption Graphics processing unit Power demand Instruction sets Programming Optimization

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Fault recovery based on parallel recomputing in transactional memory system

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Lecture Notes in Electrical Engineering 2011年 98卷 995-1002页

作者： Song, Wei Jia, Jia National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha410073 China

ISBN: (纸本)9783642217647

This paper addresses the issue of fault recovery in transactional memory, and proposes a method of fault recovery based on parallel recomputing in transactional memory system. This method utilizes the dataversioning mechanism of transactional memory system to avoid the extra cost of state saving, rolls back a single transaction to avoid wasting the computing time of the fault-free transactions, and adopts the parallel recomputing method to reduce the cost of fault recovery. This paper applies this method to OpenTM programs, and proposes the implementation method of parallel recomputing in OpenTM. At last, this paper tests the performance of this method through a test program. The experimental results show that, compared with the fault recovery method of rolling back a single transaction, the parallel recomputing method in transactional memory system can execute the fault recovery quickly and accurately and the method has a well scalability. © Springer-Verlag Berlin Heidelberg 2011.

关键词： Fault tolerance

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Context-Aware Scheduling in Wireless Networks with Successive Interference Cancellation

Context-Aware Scheduling in Wireless Networks with Successiv...

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IEEE International Conference on Communications Workshops

作者： Shaohe Lv Weihua Zhuang Xiaodong Wang Xingming Zhou National Laboratory of Parallel and Distributed Processing National University of Defense Technology Department of Electrical and Computer Engineering University of Waterloo

ISBN: (纸本)9781612842325

We consider the greedy scheduling based on the physical model in wireless networks with successive interference cancellation (SIC). There are two major stages in a scheduling scheme, link selection (to decide which link is scheduled next) and time slot selection (to deciding which slot is allocated to a given link). Most available schemes take a first-fit policy in the latter and strive to achieve good performance by careful selection of link ordering with respect to interference. Due to the accumulation effect and sequential detection nature of SIC, however, it is difficult to evaluate the interference of a link. As a result, many existing scheduling schemes become less efficient. In this paper, we take a new look on the problem and focus to the time slot selection stage. We define tolerance margin to measure the saturation of a link set and present two heuristic policies: one is to schedule a link to a slot such that the resulting set of links has a maximum tolerance margin;the other is to choose a slot such that the increase of tolerance margin is minimum. Simulation results show that the performance of the proposed schemes is better than the first-fit policy and is close to the optimal solution.

关键词： Link scheduling Successive interference cancellation Physical interference model

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