An admission control test is responsible for deciding whether a new task may be accepted by a set of running tasks, such that the already admitted and the new task are all schedulable. Admission control decisions have...
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ISBN:
(纸本)9780769541112
An admission control test is responsible for deciding whether a new task may be accepted by a set of running tasks, such that the already admitted and the new task are all schedulable. Admission control decisions have to be taken on-line and, hence, there is a strong interest in developing efficient algorithms for different setups. In this paper, we propose a novel constant-time admission control test for tasks scheduled on identical processors under partitioned Earliest Deadline First (EDF), i.e., once tasks have been assigned to a processor they remain on that processor. In particular, to model demanding real-timesystems, we consider the case where relative deadlines may be less than the minimum separation between two consecutive task activations or jobs. The main advantage of the proposed test is that the time it takes is independent of the number of tasks currently admitted in the system. While it is possible to adapt polynomial-time schedulability tests from the literature to design a linear or even constant-time admission control for this setup, the test we propose provides a better accuracy/complexity ratio. We evaluate this test through a set of detailed experiments based on synthetic tasks and a realistic case study consisting of a real-time multimedia server.
Control applications are now increasingly mapped onto multiprocessor architectures, a familiar example being automotive platforms which now consist of more than 80 electronic control units (ECUs). Such control systems...
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Maximizing passengers comfort is an important research topic in the domain of automotive systems engineering. In particular, an automatic adjustment of seat position according to driver height significantly increases ...
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Vehicular Ad-hoc Networks are a very interesting self-organizing communication system that can make the traffic on our roads much safer. A lot of aspects of the behavior of these systems are studied using network simu...
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ISBN:
(纸本)9781617387036
Vehicular Ad-hoc Networks are a very interesting self-organizing communication system that can make the traffic on our roads much safer. A lot of aspects of the behavior of these systems are studied using network simulation frameworks. While the upper communication layers of Vehicular Ad-hoc Networks are mainly simulated according to their specifications, in this paper we will highlight weak points in these simulations. They occur due the fact that the layers below the link layer are considered very rarely and are also almost neglected by the commonly used network simulation frameworks. This can potentially lead to inaccurate simulation results which can be fatal when studying safety relevant applications or application with real-time constraints. In this work in progress paper we are going to propose an approach to get this under control.
Automotive architectures consist of multiple electronic control units (ECUs) which run distributed control applications. Such ECUs are connected to sensors and actuators and communicate via shared buses. Resource arbi...
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ISBN:
(纸本)9781605589046
Automotive architectures consist of multiple electronic control units (ECUs) which run distributed control applications. Such ECUs are connected to sensors and actuators and communicate via shared buses. Resource arbitration at the ECUs and also in the communication medium, coupled with variabilities in execution requirements of tasks results in jitter in the signal/data streams existing in the system. As a result, buffers are required at the ECUs and bus controllers. However, these buffers often implement different semantics - FIFO queuing, which is the most straightforward buffering scheme, and data refreshing, where stale data is overwritten by freshly sampled data. Traditional timing and schedulability analysis that are used to compute, e.g., end-to-end delays, in such automotive architectures can only model FIFO buffering. As a result, they return pessimistic delay and resource estimates because in reality overwritten data items do not get processed by the system. In this paper we propose an analytical framework for accurately modeling such data refresh semantics. Our model exploits a novel feedback control mechanism and is purely functional in nature. As a result, it is scalable and does not involve any explicit state modeling. Using this model we can estimate various timing and performance metrics for automotive ECU networks consisting of buffers implementing different data handling semantics. We illustrate the utility of this model through three case studies from the automotive electronics domain.
Vehicular Ad-hoc Networks are a very interesting self-organizing communication system that can make the traffic on our roads much safer. A lot of aspects of the behavior of these systems are studied using network simu...
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ISBN:
(纸本)9781565553415
Vehicular Ad-hoc Networks are a very interesting self-organizing communication system that can make the traffic on our roads much safer. A lot of aspects of the behavior of these systems are studied using network simulation frameworks. While the upper communication layers of Vehicular Ad-hoc Networks are mainly simulated according to their specifications, in this paper we will highlight weak points in these simulations. They occur due the fact that the layers below the link layer are considered very rarely and are also almost neglected by the commonly used network simulation frameworks. This can potentially lead to inaccurate simulation results which can be fatal when studying safety relevant applications or application with real-time constraints. In this work in progress paper we are going to propose an approach to get this under control.
The Bluetooth SIG recently released the Health Device Profile (HDP) in an effort to standardize health device communication using Bluetooth technology. HDP uses the IEEE 11073-20601 Data Exchange Protocol as the trans...
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The evaluation of communication latency in multiprocessor platforms requires the profiling of the application, the description of the architecture of the platform and of the mapping of application tasks onto processin...
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Control applications are now increasingly mapped onto multiprocessor architectures, a familiar example being automotive platforms which now consist of more than 80 electronic control units (ECUs). Such control systems...
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Control applications are now increasingly mapped onto multiprocessor architectures, a familiar example being automotive platforms which now consist of more than 80 electronic control units (ECUs). Such control systems typically consist of several control loops, with different parts of each control application being mapped onto different processors that communicate over one or more communication buses. In such setups, the system architecture and scheduling policies have a significant impact on control performance. In this talk we will discuss both, platform architecture, as well as software design techniques for such setups, in order to satisfy real-time and control performance constraints.
This tutorial is concerned with various aspects of model-based design of hardware/software architectures of automotive systems. It will be split into three parts, the first dealing with model-based analysis of automot...
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ISBN:
(纸本)9781605589046
This tutorial is concerned with various aspects of model-based design of hardware/software architectures of automotive systems. It will be split into three parts, the first dealing with model-based analysis of automotive ECU networks, the second with synthesis of schedules for such networks, and finally the third with model-based testing of such architectures.
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