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12th International Conference on Rewriting Techniques and Applications, RTA 2001

作者： Bodirsky, Manuel Erk, Katrin Koller, Alexander Niehren, Joachim Programming Systems Lab Universität des Saarlandes Saarbrücken Germany Dept. of Computational Linguistics Universität des Saarlandes Saarbrücken Germany

ISBN: (数字)9783540451273

ISBN: (纸本)3540421173

The constraint language for lambda structures (CLLS) can model lambda terms that are known only partially. In this paper, we introduce beta reduction constraints to describe beta reduction steps between partially known lambda terms. We show that beta reduction constraints can be expressed in an extension of CLLS by group *** then extend a known semi-decision procedure for CLLS to also deal with group parallelism and thus with beta-reduction constraints. © Springer-Verlag Berlin Heidelberg 2001.

关键词： Computers

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Modeling and Performance Evaluation of TSO-Preserving Binary Optimization

Modeling and Performance Evaluation of TSO-Preserving Binary...

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International Conference on Parallel Architecture and Compilation Techniques (PACT)

作者： Cheng Wang Youfeng Wu Programming Systems Lab Microprocessor and Programming Research INTEL Research Laboratory Santa Clara CA USA

Program optimization on multi-core systems must preserve the program memory consistency. This paper studies TSO-preserving binary optimization. We introduce a novel approach to formally model TSO-preserving binary optimization based on the formal TSO memory model. The major contribution of the modeling is a sound and complete algorithm to verify TSO-preserving binary optimization with O(N 2 ) complexity. We also developed a dynamic binary optimization system to evaluate the performance impact of TSO-preserving optimization. We show in our experiments that, dynamic binary optimization without memory optimizations can improve performance by 8.1%. TSO-preserving optimizations can further improve the performance by 4.8% to a total 12.9%. Without considering the restriction for TSO-preserving optimizations, the dynamic binary optimization can improve the overall performance to 20.4%.

关键词： Optimization Instruction sets Load modeling Memory management Heuristic algorithms

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Practical weak-atomicity semantics for Java STM 08

Practical weak-atomicity semantics for Java STM

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20th ACM Symposium on Parallelism in Algorithms and Architectures, SPAA'08

作者： Menon, Vijay Adl-Tabatabait, Ali-Reza Balensiefer, Steven Hudson, Richard L. Shpeisman, Tatiana Saha, Bratin Welc, Adam Programming Systems Lab Intel Corporation Santa Clara CA 95054 Germany Department of Computer Science and Engineering University of Washington Seattle WA 98195 United States

ISBN: (纸本)9781595939739

As memory transactions have been proposed as a language-level replacement for locks, there is growing need for well-defined semantics. In contrast to database transactions, transaction memory (TM) semantics are complicated by the fact that programs may access the same memory locations both inside and outside transactions. Strongly atomic semantics, where non-transactional accesses are treated as implicit single-operation transactions, remain difficult to provide without specialized hardware support or significant performance overhead. As an alternative, many in the community have informally proposed that a single global lock semantics [18, 10], where transaction semantics are mapped to those of regions protected by a single global lock, provide an intuitive and efficiently implementable model for programmers. In this paper, we explore the implementation and performance implications of single global lock semantics in a weakly atomic STM from the perspective of Java, and we discuss why even recent STM implementations fall short of these semantics. We describe a new weakly atomic Java STM implementation that provides single global lock semantics while permitting concurrent execution, but we show that this comes at a significant performance cost. We also propose and implement various alternative semantics that loosen single lock requirements while still providing strong guarantees. We compare our new implementations to previous ones, including a strongly atomic STM. [24] Copyright 2008 ACM.

关键词： Semantics

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Configuration of labeled Trees under Lexicalized Constraints and Principles

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Research on Language and Computation 2003年第3期1卷 307-336页

作者： Duchier, Denys Programming Systems Lab Universität des Saarlandes Saarbrücken Germany (E-mail

Trees with labeled edges have widespread applicability, for examplefor the representation of dependency syntax trees. Given a fixednumber of nodes and constraints on how edges may be drawn betweenthem, the task of finding solution trees is known as a configurationproblem. In this paper, we formalize the configuration problem oflabeled trees and argue that it can be regarded as a constraintsatisfaction problem which can be solved directly and efficiently byconstraint propagation. In particular, we derive and prove correcta formulation of dependency parsing as a constraint satisfactionproblem. Our approach, based on constraints on finite sets and a new family of`selection' constraints, is especially well-suited for the compactrepresentation and efficient processing of ambiguity. We addressvarious issues of interest to the computational linguist such aslexical ambiguity, structural ambiguity, valency constraints,grammatical principles, and linear precedence. Finally we turn to thechallenge of efficient processing and characterize the servicesexpected of a constraint programming system: we define a formalconstraint language and specify its operational semantics withinference rules of propagation and distribution. This framework generalizes our presentation of immediate syntacticdependence for dependency parsing (Duchier, 1999a)and extends naturally to our corresponding treatment of linearprecedence (Duchier and Debusmann, 2001) based on a notion of topological ratherthan syntactic dependencies.

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Dependency grammar: Classification and exploration

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作者： Debusmann, Ralph Kuhlmann, Marco Programming Systems Lab. Saarland University 66123 Saarbrücken Germany Department of Linguistics and Philology Uppsala University 75126 Uppsala Sweden

ISBN: (纸本)9783540894070

Syntactic representations based on word-to-word dependencies have a long tradition in descriptive linguistics [29]. In recent years, they have also become increasingly used in computational tasks, such as information extraction [5], machine translation [43], and parsing [42]. Among the purported advantages of dependency over phrase structure representations are conciseness, intuitive appeal, and closeness to semantic representations such as predicate-argument structures. On the more practical side, dependency representations are attractive due to the increasing availability of large corpora of dependency analyses, such as the Prague Dependency Treebank [19]. © 2010 Springer-Verlag.

关键词： Syntactics

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The Oz programming model 6th

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European Workshop on Logics in Artificial Intelligence (JELIA 96)

作者： Smolka, G Programming Systems Lab German Research Center for Artificial Intelligence (DFKI) Universität des Saarlandes Geb. 45 Postfach 15 11 50 Saarbüicken D-66041 Germany

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LAR-CC: Large atomic regions with conditional commits

LAR-CC: Large atomic regions with conditional commits

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作者： Borin, Edson Wu, Youfeng Breternitz, Mauricio Wang, Cheng Institute of Computing University of Campinas Brazil Programming Systems Lab. Intel Labs. United Kingdom Advanced Software and Analytics Technology Group - AMD United Kingdom

ISBN: (纸本)9781612843551

HW/SW Co-designed systems rely on dynamic binary translation and optimizations for efficient execution of binary code. Due to memory ordering properties and other architectural constraints, most binary optimizations are applied to regions of code that are atomically executed. To ensure that the underlying hardware has enough speculative resources to execute the whole atomic region, these systems typically form short atomic regions, with only 20 to 30 instructions. However, the shorter is the atomic region the smaller is the scope for optimizations. We present LAR-CC, a novel technique that enables HW/SW co-designed systems to optimize large atomic regions and dynamically fit them into the available speculative hardware resources by means of conditional commits. The LAR-CC technique consists of two major components: 1) conditional branch instructions to conditionally skip commit operations;2) code transformations that replace commit operations by conditional commits and enable optimizations to be applied on the large atomic regions. Our experiments show that LAR-CC can effectively achieve dynamic atomic region sizes larger than 1000 instructions, providing sufficiently large scope to apply many advanced optimizations on HW/SW co-designed systems. © 2011 IEEE.

关键词： Cosine transforms

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Compiler-Managed Software-based Redundant Multi-Threading for Transient Fault Detection 07

Compiler-Managed Software-based Redundant Multi-Threading fo...

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International Symposium on Code Generation and Optimization (CGO)

作者： Cheng Wang Ho-seop Kim Youfeng Wu Victor Ying Programming Systems Lab Microprocessor Technology Laboratories Intel Corporation USA

ISBN: (纸本)9780769527642

As transistors become increasingly smaller and faster with tighter noise margins, modern processors are becoming increasingly more susceptible to transient hardware faults. Existing hardware-based redundant multi-threading (HRMT) approaches rely mostly on special-purpose hardware to replicate the program into redundant execution threads and compare their computation results. In this paper, we present a software-based redundant multi-threading (SRMT) approach for transient fault detection. Our SRMT technique uses compiler to automatically generate redundant threads so they can run on general-purpose chip multi-processors (CMPs). We exploit high-level program information available at compile time to optimize data communication between redundant threads. Furthermore, our software-based technique provides flexible program execution environment where the legacy binary codes and the reliability-enhanced codes can co-exist in a mix-and-match fashion, depending on the desired level of reliability and software compatibility. Our experimental results show that compiler analysis and optimization techniques can reduce data communication requirement by up to 88% of HRMT. With general-purpose intra-chip communication mechanisms in CMP machine, SRMT overhead can be as low as 19%. Moreover, SRMT technique achieves error coverage rates of 99.98% and 99.6% for SPEC CPU2000 integer and floating-point benchmarks, respectively. These results demonstrate the competitiveness of SRMT to HRMT approaches

关键词： Fault detection Yarn Hardware Binary codes Optimizing compilers Data communication Multithreading Application software Libraries Program processors

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Model-based coverage-driven test suite generation for software product lines 11

Model-based coverage-driven test suite generation for softwa...

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Proceedings of the 14th international conference on Model driven engineering languages and systems

作者： Harald Cichos Sebastian Oster Malte Lochau Andy Schürr TU Darmstadt Real-Time Systems Lab TU Braunschweig Institute for Programming and Reactive Systems

ISBN: (纸本)9783642244841

Software Product Line (SPL) engineering is a popular approach for the systematic reuse of software artifacts across a large number of similar products. Unfortunately, testing each product of an SPL separately is often unfeasible. Consequently, SPL engineering is in conflict with standards like ISO 26262, which require each installed software configuration of safety-critical SPLs to be tested using a model-based approach with well-defined coverage *** this paper we address this dilemma and present a new SPL test suite generation algorithm that uses model-based testing techniques to derive a small test suite from one variable 150% test model of the SPL such that a given coverage criterion is satisfied for the test model of every product. Furthermore, our algorithm simplifies the subsequent selection of a small, representative set of products (w.r.t. the given coverage criterion) on which the generated test suite can be executed.

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Off-line scheduling of a real-time system 98

Off-line scheduling of a real-time system

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1998 ACM Symposium on Applied Computing, SAC 1998

作者： Schild, Klaus Würtz, Jörg Daimler-Benz AG Research and Technology Alt-Moabit 96a BerlinD-10559 Germany Programming Systems Lab DFKI Stuhlsatzenhausweg 3 SaarbrückenD-66123 Germany

ISBN: (纸本)0897919696

This paper shows how a recently introduced class of applications can be solved by constraint programming. This new type of application is due to the emergence of special real-time systems, enjoying increasing popularity in such diverse areas as automotive electronics and aerospace industry. These real-time systems are time triggered in the sense that their overall behavior is globally controlled by a recurring clock tick. For this off-line scheduling problem a potentially indefinite, periodic processing has to be mapped onto a single time window of a fixed length. We make this new class of applications amenable to constraint programming. We describe which traditional scheduling and realtime computing techniques led to success and which failed when confronted with a large-scale application of this type. Global constraints were used to reduce memory consumption and to speed up computation. An elaborate heuristic, borrowed from Operations Research, was employed to solve the problem. Furthermore, we show that mere serialization is sufficient to find a valid schedule. The actual implementation was done in the concurrent constraint programming language Oz. © 1998 ACM.

关键词： Real time systems

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