Assessment of vertical shifted carrier schemes for sinusoidal pulsewidth modulation

作     者：Kadiyala, Bhavana Paramasivan, Muthukumar Bensraj, R. 

作者机构：Annamalai Univ Dept Elect Engn Annamalai Nagar Chidambaram 608002 Tamil Nadu India Saveetha Inst Med & Tech Sci Saveetha Sch Engn Dept Elect & Elect Engn Chennai Tamil Nadu India 

出 版 物：《JOURNAL OF POWER ELECTRONICS》 (J. Power Electron.)

年 卷 期：2024年第24卷第11期

页      面：1719-1730页

核心收录：

学科分类：0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

基　　金：The authors are thankful to Dr. Alapati Purna Chandra Rao  M.A  M.Phil  Ph.D  Associate Professor  Department of Freshman Engineering  PVP Siddhartha Institute of Technology- Vijayawada  India  for assisting in drafting of the research paper 

主　　题：Reverse modulation index Mutual modulation index Voltage source inverter Pulsewidth modulation Field-programmable gate array 

摘      要：The carrier modulated sinusoidal pulsewidth modulation scheme has been acknowledged for its fundamental fortification and harmonic reduction in DC-AC conversion. This study is focused on how to get a variable output voltage with the least harmonics by changing the amplitude of the carrier wave vertically instead of modulating the reference wave (conventional SPWM). This paper proposes four control schemes for achieving the maximum fundamental voltage in a three phase voltage source inverter. The four schemes are single edge carrier shifted with (i) fixed reference and (ii) variable reference, and double edge carrier shifted with (iii) fixed reference and (iv) variable reference. In addition, the reverse modulation index and mutual modulation index are introduced as new control variables for examination. These schemes are simulated with a three phase inverter and the performance is compared with conventional sinusoidal pulsewidth modulation using MATLAB R2021. The amplitude of the fundamental voltage and the corresponding THD are reported. Digital implementations of the proposed schemes are premeditated by using VHDL language and ModelSim. The validity of the proposed schemes is experimentally investigated through a laboratory prototype of a three phase inverter module incorporated with an FPGA Spartan 6 device. This prototype is tested with a three phase induction motor as the load. The fundamental voltage and THD for the existing and proposed schemes are reported.