A scalable single poly EEPROM cell for embedded memory applications

作     者：Baldi, L Cascella, A Vajana, B 

作者机构：Non Volatile Memory Process Development SGS-THOMSON Microelectronics Via C. Olivetti 2 I-20041 Agrate Brianza Italy. Tel: -39-39 6035310. Fax:-39-39 6035233 

出 版 物：《MICROELECTRONICS JOURNAL》 (微电子学杂志)

年 卷 期：1997年第28卷第6-7期

页      面：657-661页

核心收录：

学科分类：0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 0805[工学-材料科学与工程（可授工学、理学学位）] 

基　　金：Italian Government 

摘      要：An increasing number of integrated circuits requires the embedding of a limited amount (up to 16-64 kbits) of EEPROM memory. For this application, low process complexity, robust structure and good reliability are more important than small cell size. In this paper we present the design and characterization of a single poly EEPROM cell, optimized for embedded applications, and characterized by a good shrink potential. A cell area of 68.7 mu m(2) has been obtained in 0.7 mu m technology, and electrical characterization has shown the possibility of achieving a programming time of less than 1 msec, while an endurance of more than 10 million cycles has been achieved at 125 degrees C, with a programming time of 2 msec. By further shrink of the same basic layout, cell areas of 55 and 44 mu m(2) have been obtained, and similar programming and endurance performances have been demonstrated. (C) 1997 Elsevier Science Ltd.