Hardware compiler realising concurrent processes in reconfigurable logic

作     者：Diessel, O Milne, G 

作者机构：Univ New S Wales Sch Comp Sci & Engn Sydney NSW 2052 Australia Univ Western Australia Dept Comp Sci & Software Engn Crawley WA 6009 Australia 

出 版 物：《IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES》 (IEE Proc Comput Digital Tech)

年 卷 期：2001年第148卷第4-5期

页      面：152-162页

核心收录：

主　　题：digital logic Formal languages and computational linguistics Circal process algebra Parallel architecture formal languages reconfigurable logic Logic and switching circuits behavioural descriptions Parallel programming and algorithm theory microprocessor-based machines process algebraic language high-level languages hardware compiler dynamic hardware Digital circuit design, modelling and testing concurrent computation modelling Logic circuits parallel architectures Computer-aided circuit analysis and design reconfigurable computers field programmable gate arrays Computer-aided logic design run-time reconfiguration concurrent processes Electronic engineering computing reconfigurable architectures concurrency theory process algebra field programmable gate array technology real concurrency logic CAD FPGA compiler software model circuit layout CAD 

摘      要：Reconfigurable computers based on field programmable gate array technology allow applications to be realised directly in digital logic. The inherent concurrency of hardware distinguishes such computers from microprocessor-based machines in which the concurrency of the underlying hardware is fixed and abstracted from the programmer by the software model. However, reconfigurable logic provides us with the potential to exploit real concurrency. It is therefore interesting to know how to exploit this concurrency, how to model concurrent computations, and which languages allow this dynamic hardware to be programmed most effectively. The purpose of this work is to describe an FPGA compiler for the Circal process algebra. In so doing, the authors demonstrate that behavioural descriptions expressed in a process algebraic language can be readily and intuitively compiled to reconfigurable logic and that this contributes to the goal of discovering appropriate high-level languages for run-time reconfiguration.