Simple digital algorithm for improved performance in a boost PFC converter operating in CCM

作     者：Nair, Harish Sudhakaran Narasamma, Lakshmi 

作者机构：Indian Inst Technol Madras Dept Elect Engn Chennai Tamil Nadu India 

出 版 物：《IET POWER ELECTRONICS》 (IET Power Electron.)

年 卷 期：2019年第12卷第5期

页      面：1102-1113页

核心收录：

学科分类：0808[工学-电气工程] 08[工学] 

主　　题：reference current line frequency Fasting Power factor correction Converters Computer algorithms mean value current controller continuous conduction mode Dynamic response input current voltage loop output voltage 

摘      要：In power factor correction (PFC) converters, achieving both good steady-state input current waveform and fast output dynamic response is a challenge. This is due to the effect of the double-line frequency ripple present in the sensed output voltage signal which tends to distort the reference current applied to the current controller, thus leading to a distorted input current waveform. Low bandwidth (BW) voltage loop designs to reduce this input current distortion make the output dynamic response very sluggish. A digital control algorithm for the estimation of the average value of the sensed output voltage is proposed in this study to achieve low total harmonic distortion input current and fast dynamic response with a higher BW voltage loop. The proposed algorithm is computationally less intensive and requires no additional sensors or circuitry. The effectiveness of the proposed control algorithm is validated through simulation and experimental tests on a 300 W boost PFC converter prototype operating in continuous conduction mode.