A 32 Kbyte, 200 Ns Read-Write Cycle Magnetic Film Memory System

作     者：Kayser, W. 

作者机构：Honeywell Information Systems Inc. Phoenix Ariz United States 

出 版 物：《IEEE Transactions on Magnetics》 (IEEE Trans Magn)

年 卷 期：1972年第8卷第3期

页      面：366-366页

学科分类：0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 0805[工学-材料科学与工程（可授工学、理学学位）] 0702[理学-物理学] 

主　　题：Magnetic films Read-write memory Costs Coupling circuits Logic devices Logic circuits Substrates Sputtering Silicon Distributed parameter circuits 

摘      要：A 32 kbyte,- 60 ns access time, 200 ns read/write cycle time, low cost O.S¢ bit) planar magnetic film memory system is described. High-density (3500 bit/in.2), destructive reaq.-out· (DRO), coupled hard axis (CHA) magnetic film storage device arrays (integration level: 40 000 bits per 4.1 X 4.3 inch substrate) are batch fabricated by thin film deposition and photolithographic techniques. Monolithic integrated drive and sense circuits interface with emitter coupled logic (ECL) circuits and provide within one silicon chip the transition from stack transmission lines to logic levels. The memory is internally organized as 4096 word by 72 bit system. Compatible electronic packaging assembly and interconnection techniques are described. Cost considerations and extensions of the technology are discussed. Copyright © 1973 by The Institute of Electrical and Electronics Engineers, Inc.