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CNNP-v2: A Memory-Centric Architecture for Low-Power CNN Processor on Domain-Specific Mobile Devices

ieee journal on emerging and selected topics in circuits and systems 2019年第4期9卷 598-611页

作者： Choi, Sungpill Bong, Kyeongryeol Han, Donghyeon You, Hoi-Jun Korea Adv Inst Sci & Technol Sch Elect Engn Daejeon 34141 South Korea

An energy-efficient memory-centric convolutional neural network (CNN) processor architecture is proposed for smart devices such as wearable devices or the internet of things (IoT) devices. To achieve energy-efficient processing, it has two key features: First, 1-D shift convolution PEs with fully distributed memory architecture achieve 1.5TOPS/W energy efficiency, and it can be boosted up equivalent 3.1TOPS/W energy efficiency with separable filter approximation and transpose-read SRAM. Compared with conventional architecture, even though it has massively parallel 1024 MAC units, it achieves high energy efficiency by scaling down the voltage to 0.46V due to its fully local routed design. Second, fully configurable 2-D mesh core-to-core interconnection support the various size of input features to maximize utilization. The proposed architecture is evaluated 16mm(2) chip, which is fabricated with a 65nm CMOS process. As a result, it performs real-time face recognition with the only 68.9mW at 40MHz and 0.6V.

关键词： Memory architecture Digital circuits Energy efficiency Integrated circuit interconnections Convolutional neural networks Face recognition Convolutional neural network (CNN) memory-centric architecture low-power image processing energy-efficient digital circuit

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Review and Benchmarking of Precision-Scalable Multiply-Accumulate Unit Architectures for Embedded Neural-Network Processing

Review and Benchmarking of Precision-Scalable Multiply-Accum...

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1st ieee International Conference on Artificial Intelligence circuits and systems (AICAS)

作者： Camusy, Vincent Meiy, Linyan Enz, Christian Verhelst, Marian Ecole Polytech Fed Lausanne ICLAB CH-1015 Lausanne Switzerland Katholieke Univ Leuven ESAT MICAS Lab B-3001 Leuven Belgium

The current trend for deep learning has come with an enormous computational need for billions of Multiply-Accumulate (MAC) operations per inference. Fortunately, reduced precision has demonstrated large benefits with low impact on accuracy, paving the way towards processing in mobile devices and IoT nodes. To this end, various precision-scalable MAC architectures optimized for neural networks have recently been proposed. Yet, it has been hard to comprehend their differences and make a fair judgment of their relative benefits as they have been implemented with different technologies and performance targets. To overcome this, this work exhaustively reviews the state-of-the-art precision-scalable MAC architectures and unifies them in a new taxonomy. Subsequently, these different topologies are thoroughly benchmarked in a 28nm commercial CMOS process, across a wide range of performance targets, and with precision ranging from 2 to 8 bits. circuits are analyzed for each precision as well as jointly in practical use cases, highlighting the impact of architectures and scalability in terms of energy, throughput, area and bandwidth, aiming to understand the key trends to reduce computation costs in neural-network processing.

关键词： Computer architecture Scalability Neural networks Deep learning Application specific integrated circuits Taxonomy ASIC deep neural networks precision-scalable circuits configurable circuits MAC multiply-accumulate units

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Adapted Auxiliary-Resonant Commutated Pole in the Dual-Active Bridge

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ieee journal OF emerging AND selected topics IN POWER ELECTRONICS 2019年第4期7卷 2553-2560页

作者： Voss, Johannes Warmuz, Julia Mathai, Deepa De Doncker, Rik W. Rhein Westfal TH Aachen Inst Power Generat & Storage Syst D-52062 Aachen Germany

In this paper, a dual-active bridge direct current (dc)-dc converter with an adapted auxiliary-resonant commutated pole (ARCP) concept is presented. First, the classic ARCP is reviewed and subsequently, the adapted concept is explained. The adaptions guarantee a zero-voltage switching without applying an additional boost current as needed in the classic ARCP approach. Thus, the complexity of the resonant commutations is reduced and reliability can be increased. To obtain the optimal auxiliary switch, various power-electronic devices are compared in view of controllability, speed, and conduction losses in the second part. Possible auxiliary switch configurations for a high-power application are discussed, and measurement results are illustrated. Here, integrated gate-commutated thyristors, thyristors, and insulated-gate bipolar transistors in combination with SiC diodes are compared, and differences in the switching behavior are presented. Finally, experimental test results of the converter at low voltages are presented.

关键词： Switches Capacitors Clamps Inductors Snubbers Switching circuits DC-DC power converters power conversion switching converters zero voltage switching

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Impact of Non-Ideal Characteristics of Resistive Synaptic Devices on Implementing Convolutional Neural Networks

Impact of Non-Ideal Characteristics of Resistive Synaptic De...

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1st AI Compute Symposium (AICS)

作者： Sun, Xiaoyu Yu, Shimeng Georgia Inst Technol Sch Elect & Comp Engn Atlanta GA 30332 USA

emerging non-volatile memory (eNVM) based resistive synaptic devices have shown great potential for implementing deep neural networks (DNNs). However, the eNVM devices typically suffer from various non-ideal effects which may degrade the performance of the system. Based on a representative convolutional neural network (CNN) model for CIFAR-10 dataset, this paper comprehensively investigates the impact of those non-ideal characteristics, such as nonlinearity and asymmetry of conductance tuning, variations, endurance and retention, on the training/inference accuracy. The compact models of the device non-ideal effects are incorporated into the TensorFlow framework. Our simulation results suggest that 1) the training accuracy is more sensitive to the asymmetry of conductance tuning than the nonlinearity;2) the conductance range variation does not degrade the training accuracy, instead, a small variation can even reduce the accuracy loss introduced by asymmetry;3) device-to-device variation can also remedy the accuracy loss due to asymmetry while cycle-to-cycle variation leads to significant accuracy degradation;4) the accuracy degradation will not be noticeable if the endurance cycles are more than 7,000 cycles;and 5) different drifting modes affect the inference accuracy differently, and the best case is where the conductance is drifting up/down randomly.

关键词： emerging non-volatile memory synaptic devices deep neural networks variation reliability in-situ training inference

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BraggNet: Complex Photonic Integrated Circuit Reconstruction Using Deep Learning

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ieee journal OF selected topics IN QUANTUM ELECTRONICS 2021年第6期27卷 1页

作者： Cauchon, Jonathan Vallee, Jean-Michel St-Yves, Jonathan Shi, Wei Univ Laval Ctr Opt Photon & Laser COPL Quebec City PQ G1V 0A6 Canada

We propose a deep learning model to reconstruct physical designs of complex coupled photonic systems, such as waveguide Bragg gratings, fromtheir spectral responses for inverse design and fabrication diagnosis. Traditional reconstructing algorithms demand considerable computing resources at every query. Conversely, machine learning algorithms usemost of the computing resources during the training process and provide effortless and orders-of-magnitude faster analysis in response to queries. This approach is demonstrated using silicon photonic grating-assisted, contra-directional couplers consisting of thousands of Bragg periods. The contra-directional couplers are modeled as coupled cavities, for which a transfer matrix model is used to generate a synthetic dataset comprising a strategic design parameter space. The free-form, architecture-independent model allows to include any geometries to the design parameter space. Upon proper training, themodel achieves 1.4% mean absolute percentage error on device reconstruction and thus proves suitable for inverse design applications. To further show its potential for assessment of fabricated devices, another dataset is generated to emulate the fabrication conditions of a nominal design hindered by fabrication imperfections. Themodel is shown to reconstruct devices from experimental measurements with greater than 600-fold improvement in speed compared to the classical layer-peeling algorithm. This proves promising for data-driven processes required by Industry 4.0.

关键词： Silicon photonics photonic integrated circuits bragg gratings machine learning artificial intelligence neural networks fabrication diagnosis

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Effect of Class 2 Ceramic Capacitor Variations on Switched-Capacitor and Resonant Switched-Capacitor Converters

Effect of Class 2 Ceramic Capacitor Variations on Switched-C...

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作者： Xu, Jiale Gu, Lei Rivas-Davila, Juan Stanford University StanfordCA94305 United States

Class 2 ceramic capacitors, such as X7R, have relatively high energy density compared to Class 1 ceramic capacitors. However, they experience changes due to aging, temperature, and electric field. The measured X7R capacitance drop is 1%-2% per decade hour due to aging, 18% due to a temperature change from 25 °C to 125 °C, and 75% due to an applied voltage that is 80% of the rated voltage. The measured equivalent series resistance (ESR) of the X7R capacitors shows an increase of 20% to 70% due to aging of 1680 h, and a 50% fluctuation in value when we apply 20% to 80% of the rated voltage. In switched-capacitor (SC) and resonant SC (ReSC) converters, these variations can shift a converter's operating point and result in higher equivalent output resistance and lower efficiency. We quantified the converter performance degradation caused by capacitor variations in the simulation and demonstrated the results by implementing a 1 MHz 25 W 1:4 Dickson ReSC converter. The converter efficiency decreases from 93.1% to 90.7% as a result of capacitor variations mainly due to the aging effect. © 2013 ieee.

关键词： Timing circuits

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Optimum Design of Decoupled Concentric Coils for Operation in Double-Receiver Wireless Power Transfer systems

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ieee journal OF emerging AND selected topics IN POWER ELECTRONICS 2019年第3期7卷 1982-1998页

作者： Pratik, Ujjwal Varghese, Benny J. Azad, Ahmed Pantic, Zeljko Utah State Univ Coll Engn Dept Elect & Comp Engn Logan UT 84322 USA

Wireless power transfer is becoming ubiquitous in consumer electronics and electrified transportation, providing a convenient method to supply power or charge various devices, such as cell phones, watches, laptops, electric vehicles, and so on. Delivering power from one transmitter unit to more than one receiver can save space and reduce the cost of the overall system. For applications where the sizes of transmitter and receiver units are commeasurable, a frequently used design is the one with carefully overlapped D-shaped coils (also named bipolar pad) to achieve decoupling between coils. In this paper, an alternative optimized design of two concentric decoupled coils is proposed. The design allows the receiver coils to operate at close proximity, collecting power from a shared magnetic field generated by a single transmitter pad. The design methodology is based on a bucking coil layout where the coils' decoupling is achieved by means of flux cancellation caused by alternating the winding direction of turns in one of the coils. Apart from eliminating coupling between the two receivers, the proposed design maximizes the coupling between the transmitter and the second receiver coil and consequently increases the power transfer capability, offering the equivalent coupling coefficient similar to or better than a pair of bipolar DD coils. Finally, the number and space between turns are selected to improve the quality factor of the proposed receiver. The proposed solution is designable analytically and the second receiver can be added even after the first receiver is already built. Moreover, the proposed design demonstrates superior misalignment tolerance, particularly in the lateral direction, compared to other decoupled coil designs. The proposed methodology is validated through simulations and experimental tests and has proved to be accurate and easy for implementation.

关键词： Coupling circuits decoupled coil design double receiver quality factor wireless power transfer (WPT)

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Research from the ieee IBM AI Compute and emerging Technology Symposia

Research from the IEEE IBM AI Compute and Emerging Technolog...

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作者： Ziegler, Matthew M. Kailas, Krishnan Zhang, Xin Joshi, Rajiv V. IBM Thomas J. Watson Research Center Yorktown HeightsNY10598 United States

In recent years, interest in machine learning, deep learning, and more broadly AI has taken the computing industry by storm. Advancements in AI compute acceleration, along with algorithmic innovations and availability of training data, are widely credited as the catalysts to the resurgence of AI. The potential of AI has caught the interest of researchers spanning various disciplines, e.g., across the hardware and software computing stack, and career stages, e.g., from students to seasoned researchers. This interest has led to a staggering rate of advancement in the field. With the goal of bringing together researchers from various disciplines, career stages, and from industry and academia, the ieee and IBM organized the 1st AI Compute Symposium (AICS18) [items [1]-[4] in the Appendix]. © 2011 ieee.

关键词： Deep learning

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An Isolated Phase-Shift-Controlled Quasi-Switched-Capacitor DC/DC Converter With Gallium Nitride Devices

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ieee journal OF emerging AND selected topics IN POWER ELECTRONICS 2019年第2期7卷 609-621页

作者： Hu, Boxue Brothers, John Alex Zhang, Xuan Fu, Lixing Alsmadi, Yazan M. Wang, Jin Ohio State Univ Ctr High Performance Power Elect Columbus OH 43210 USA Tesla Inc Palo Alto CA 94304 USA Texas Instruments Inc Santa Clara CA 95051 USA Amer Elect Power Co New Albany OH 43054 USA

This paper presents the circuit analysis and design guidelines of an isolated voltage-fed phase-shift-controlled quasi-switched-capacitor (QSC) dc/dc circuit. The circuit under study is friendly toward the adoption of gallium nitride (GaN) devices by reducing the voltage stress on the devices and mitigating the circulating energy in the circuit. Compared to the conventional half- and full-bridge-based circuits, the phase-shift-controlled QSC circuit can reduce the voltage stress of high-voltage-side devices to 2/3 of the de bus voltage. The reduced voltage stress can greatly extend the short-circuit withstand time of GaN devices and, thus, improve the reliability of the overall circuit. In a manner similar to a dual-active-bridge circuit, the circuit under study has low circulating energy since it achieves soft switching operation merely with the energy stored in the transformer's leakage inductance. In this paper, the operation principle, soft switching analysis, and design guidelines of the circuit are presented. A 1-kW, 400-48-V, 500-kHz switching frequency prototype with GaN devices was built and tested to verify the circuit analysis.

关键词： DC-DC power converters gallium nitride (GaN) reliability switched capacitor circuits zero-voltage switching (ZVS)

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CNNP-v2: A Memory-Centric Architecture for Low-Power CNN Processor on Domain-Specific Mobile Devices

CNNP-v2: A Memory-Centric Architecture for Low-Power CNN Pro...

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1st ieee International Conference on Artificial Intelligence circuits and systems (AICAS)

作者： Choi, Sungpill Bong, Kyeongryeol Han, Donghyeon You, Hoi-Jun Korea Adv Inst Sci & Technol Sch Elect Engn Daejeon 34141 South Korea

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