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field programmable gate array-based design and realisation of automatic censored cell averaging constant false alarm rate detector based on ordered data variability

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IET CIRCUITS DEVICES & SYSTEMS 2009年第1期3卷 12-21页

作者： Alsuwailem, A. M. Alshebeili, S. A. Alhowaish, M. H. Qasim, S. M. King Saud Univ Dept Elect Engn Riyadh 11421 Saudi Arabia Commun & Informat Technol Commis Riyadh Saudi Arabia

The design and field programmable gate array (FPGA)-based realisation of automatic censored cell averaging (ACCA) constant false alarm rate (CFAR) detector based on ordered data variability (ODV) is discussed here. The ACCA-ODV CFAR algorithm has been recently proposed in the literature for detecting radar target in non-homogeneous background environments. The ACCA-ODV detector estimates the unknown background level by dynamically selecting a suitable set of ranked cells and doing successive hypothesis tests. The proposed detector does not require any prior information about the background environment. It uses the variability index statistic as a shape parameter to accept or reject the ordered cells under investigation. Recent advances in FPGA technology and availability of sophisticated design tools have made it possible to realise the computation intensive ACCA-ODV detector in hardware, in a cost-effective way. The architecture is modular and has been implemented and tested on an Altera Stratix II FPGA using Quartus II software. The post place and route result show that the proposed design can operate at 100 MHz, the maximum clock frequency of the prototyping board and for this frequency the total processing time required to perform a single run is 0.21 mu s. This amounts to a speedup for the FPGA-based hardware implementation by a factor of similar to 110 as compared to software-based implementation, which takes 23 mu s to perform the same operation.

关键词： automatic censored cell averaging hardware implementation constant false alarm rate detector logic design detector circuits Altera Stratix II ordered data variability field programmable gate array Quartus II software field programmable gate arrays

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field programmable gate array implementation of a fault location system in transmission lines based on artificial neural networks

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IET GENERATION TRANSMISSION & DISTRIBUTION 2011年第2期5卷 191-198页

作者： Ezquerra, J. Valverde, V. Mazon, A. J. Zamora, I. Zamora, J. J. Univ Basque Country Elect & Telecommun Dept Fac Engn Bilbao Bilbao 48013 Spain Univ Basque Country Dept Elect Engn Fac Engn Bilbao Bilbao 48013 Spain

In the field of electrical engineering there are many areas where artificial neural networks (ANNs) are being applied. ANNs can be modelled and implemented by means of the execution of specific software in sequential computers. Nevertheless, if a real-time application wants to be developed, it is necessary to study how to use its massively parallel processing capacity by a specific electronic system. This study presents the methodology, the design and the field programmable gate array implementation process of a fault classification and location prototype for overhead transmission lines, based on ANNs.

关键词： Overhead power lines fault classification field programmable gate arrays Logic circuits Neural computing techniques power engineering computing sequential computers fault location artificial neural networks power transmission faults Logic and switching circuits field programmable gate array fault location system electrical engineering Power engineering computing power overhead lines neural nets overhead transmission lines

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field programmable gate array implementation of fuzzy variable step size adaptive linear element for adaptive frequency estimation

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IET SIGNAL PROCESSING 2017年第9期11卷 1083-1094页

作者： Nanda, Sarita Dash, P. K. KIIT Univ Sch Elect Engn Bhubaneswar Orissa India SOA Univ Multidisciplinary Res Cell Bhubaneswar Orissa India

Accurate estimation of power signal frequency is an important requirement for many application areas that include system protection, energy quality monitoring and instrumentation. Though significant efforts have been made since long to develop potent algorithms for accurate estimation of power signal frequency, still their accuracy and convergence speed are a challenge under sudden frequency drift and variations. Therefore, this study focuses on a low complexity adaptive linear element filter using quadratic signal model, whose parameters are adjusted using a fast variable step size fuzzy logic-based learning algorithm to provide better convergence and noise rejection properties for the estimation of frequency from noisy and distorted signals. In addition, the new filter has also been implemented on a field programmable gate array hardware and Xilinx 14.2 with Sysgen software for the tracking of dynamic signal parameters in single and three phase power networks. Various numerical and experimental results are addressed for estimation of frequency of time varying sinusoids.

关键词： fuzzy logic adaptive filters convergence frequency estimation field programmable gate arrays field programmable gate array adaptive frequency estimation fuzzy variable step size adaptive linear element power signal frequency system protection energy quality monitoring instrumentation convergence speed frequency drift low complexity adaptive linear element filter quadratic signal model fast variable step size fuzzy logic-based learning algorithm noise rejection properties distorted signals Xilinx 14 2 Sysgen software dynamic signal parameters three phase power networks time varying sinusoids

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field programmable gate array-Based Attitude Stabilization

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JOURNAL OF AEROSPACE COMPUTING INFORMATION AND COMMUNICATION 2009年第7期6卷 451-463页

作者： Stepaniak, Michael J. de Haag, Maarten Uijt van Graas, Frank USAF Inst Technol Dept Elect & Comp Engn Wright Patterson AFB OH 45433 USA Ohio Univ Avion Engn Ctr Stocker Ctr 321B Athens OH 45701 USA

A system for determining vehicle attitude using a field programmable gate array and low-cost gyroscopes is presented. The method is intended to support the stabilization of a short duration, unmanned aerial vehicle. Using a microelectromechanical system inertial sensor for the calibration and serial interface, the algorithm sidesteps concerns related to electromagnetic interference and the impact of embedded, proprietary filters. An Allan variance analysis is used to characterize the sensor errors and predict system performance. A floating point representation using a direction cosine matrix is hosted on the field programmable gate array alongside the platform stabilization feedback loops. Although prone to drifting without additional aiding, the derived attitude has been demonstrated to be effective in stabilizing a remotely piloted quadrotor.

关键词： field programmable gate array Inertial Sensor Quadrotor Gyroscopes Microelectromechanical Systems Electromagnetic Interference Micro Air Vehicle Feedback Loop Attitude Stabilization Flight Testing

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field programmable gate array-based sensorless control of a brushless synchronous starter generator for aircraft application

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IET ELECTRIC POWER APPLICATIONS 2011年第1期5卷 181-192页

作者： Maalouf, A. Idkhajine, L. Le Ballois, S. Monmasson, E. Thales Avion Elect Syst Elect Dev Dept F-78400 Chatou France Univ Cergy Pontoise Elect Engn & Ind Data Proc Dept F-95031 Cergy Pontoise France

Sensorless control of synchronous machine (SM) is a well-investigated research topic. However, avionics manufacturers still have restrictions about its applications due to the complexity of the on-board systems. This study presents a study investigating the use of an extended Kalman filter (EKF) to estimate the position and speed of a brushless exciter synchronous starter/generator. In spite of the machine complexity and the critical choice of the EKF covariance matrices, the EKF observer presents satisfying simulation results in estimating the position and the velocity of the mentioned motor during the start-up. Experimental results performed on an SM with an EKF implemented on a field programmable gate array are also shown to prove the efficiency of this type of implementation.

关键词： Spatial variables control brushless synchronous starter generator Control of electric power systems avionics Kalman filters Logic and switching circuits Aerospace control Avionics velocity control sensorless control Logic circuits extended Kalman filter sensorless machine control field programmable gate arrays Velocity, acceleration and rotation control Synchronous machines synchronous generators field programmable gate array position control starting observers

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field programmable gate array-based Haar classifier for accelerating face detection algorithm

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IET IMAGE PROCESSING 2010年第3期4卷 184-194页

作者： Gao, C. Lu, S. -L. L. Suh, T. Lim, H. Broadcom Corp Wireless Connect San Diego CA 92127 USA Intel Corp Oregon Microarchitecture Lab Hillsboro OR 97124 USA Korea Univ Seoul 136701 South Korea

The authors present a novel approach of using reconfigurable fabric to accelerate a face detection algorithm based on the Haar classifier. With highly pipelined architecture and utilising abundant parallel arithmetic units in FPGA, the authors have achieved real-time performance of face detection with very high detection rate and low false positives. The 1-classifier and 16-classifier realisations in an accelerator provide 10x and 72x speedups, respectively, over the software counterpart. Moreover, the authors', approach is scalable towards the resources available on FPGA and it will gain more momentum as the Geneseo Initiative is introduced in the market. This work also provides an understanding of using the reconfigurable fabric for accelerating non-systolic-based vision algorithms.

关键词： field programmable gate arrays Logic circuits Image recognition reconfigurable fabric face recognition Logic and switching circuits face detection Computer vision and image processing techniques image classification Haar classifier parallel arithmetic units field programmable gate array Geneseo Initiative pipelined architecture Haar transforms

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field programmable gate array Based Fuzzy Neural Signal Processing System for Differential Diagnosis of QRS Complex Tachycardia and Tachyarrhythmia in Noisy ECG Signals

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JOURNAL OF MEDICAL SYSTEMS 2012年第2期36卷 765-775页

作者： Chowdhury, Shubhajit Roy Jadavpur Univ Dept Elect & Telecommun Engn IC Design & Fabricat Ctr Kolkata 700032 India

The paper reports of a field programmable gate array (FPGA) based embedded system for detection of QRS complex in a noisy electrocardiogram (ECG) signal and thereafter differential diagnosis of tachycardia and tachyarrhythmia. The QRS complex has been detected after application of entropy measure of fuzziness to build a detection function of ECG signal, which has been previously filtered to remove power line interference and base line wander. Using the detected QRS complexes, differential diagnosis of tachycardia and tachyarrhythmia has been performed. The entire algorithmhas been realized in hardware on an FPGA. Using the standard CSE ECG database, the algorithm performed highly effectively. The performance of the algorithm in respect of QRS detection with sensitivity (Se) of 99.74% and accuracy of 99.5% is achieved when tested using single channel ECG with entropy criteria. The performance of the QRS detection system has been compared and found to be better than most of the QRS detection systems available in literature. Using the system, 200 patients have been diagnosed with an accuracy of 98.5%.

关键词： field programmable gate array Fuzzy entropy Electrocardiogram QRS complex

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field programmable gate array Reliability Analysis Using the Dynamic Flowgraph Methodology

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NUCLEAR ENGINEERING AND TECHNOLOGY 2016年第5期48卷 1192-1205页

作者： McNelles, Phillip Lu, Lixuan Univ Ontario Inst Technol UOIT Fac Energy Syst & Nucl Sci 2000 Simcoe St North Oshawa ON L1H 7K4 Canada

field programmable gate array (FPGA)-based systems are thought to be a practical option to replace certain obsolete instrumentation and control systems in nuclear power plants. An FPGA is a type of integrated circuit, which is programmed after being manufactured. FPGAs have some advantages over other electronic technologies, such as analog circuits, microprocessors, and programmable Logic Controllers (PLCs), for nuclear instrumentation and control, and safety system applications. However, safety-related issues for FPGA-based systems remain to be verified. Owing to this, modeling FPGA-based systems for safety assessment has now become an important point of research. One potential methodology is the dynamic flowgraph methodology (DFM). It has been used for modeling software/hardware interactions in modern control systems. In this paper, FPGA logic was analyzed using DFM. Four aspects of FPGAs are investigated: the "IEEE 1164 standard," registers (D flip-flops), configurable logic blocks, and an FPGA-based signal compensator. The ModelSim simulations confirmed that DFM was able to accurately model those four FPGA properties, proving that DFM has the potential to be used in the modeling of FPGA-based systems. Furthermore, advantages of DFM over traditional reliability analysis methods and FPGA simulators are presented, along with a discussion of potential issues with using DFM for FPGA-based system modeling. Copyright (C) 2016, Published by Elsevier Korea LLC on behalf of Korean Nuclear Society.

关键词： Dynamic Flowgraph Methodology field programmable gate array Instrumentation and Control Nuclear Power Plant Reliability

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field programmable gate array-based PCI interface for a coprocessor system

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MICROPROCESSORS AND MICROSYSTEMS 1999年第7期22卷 373-388页

作者： Kuusilinna, K Hämäläinen, T Saarinen, J Tampere Univ Technol Signal Proc Lab FIN-33101 Tampere Finland

This paper presents the design and implementation of a field programmable gate array (FPGA)-based PCI bus interface for a general purpose parallel neurocomputer, which is hosted by a personal computer. The basic background of the PCI bus and a detailed discussion of applicable FPGA design considerations are given. With FPGA, critical implementation factors are the realization of fast-enough state machines and efficient resource allocation. Emphasis is placed on presenting how to allocate resources efficiently from the VHDL hardware description language. Related to the overall implementation, PCI bus agent initialization and configuration from the operating system are considered. (C) 1999 Elsevier Science Ltd. All rights reserved.

关键词： PCI field programmable gate array VHDL synthesis

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field programmable gate array (FPGA) Based Embedded System Design for AFM Real-Time Control

Field Programmable Gate Array (FPGA) Based Embedded System D...

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IEEE International Conference on Control Applications Part of 2010 IEEE Multi-Conference on Systems and Control

作者： Sun, Yifan Fang, Yongchun Zhang, Yudong Dong, Xiaokun Nankai Univ Inst Robot & Automat Informat Syst IRAIS Tianjin 300071 Peoples R China

ISBN: (纸本)9781424453634

This report describes the realization of an embedded hardware system designed to perform fast control for an atomic force microscope (AFM). Traditional implementation of control algorithms for AFMs, either PC-based or DSP-based, does not meet the high-speed scanning requirement. Considering the capability of parallel computing, FPGA is employed to achieve real-time control for an AFM equipment. Specifically, in the designed embedded system, the hardware includes several key components of signal acquisition, signal conversion, data communication as well as the FPGA-based control law implementation. Besides higher control frequency, the designed FPGA-based embedded system provides a general platform for different advanced control strategies, on which a variety of control algorithms can be implemented and tested conveniently by replacing the codes in the software rather than changing hardware structure, due to the merit that FPGA can integrate internal CPU and it has a large number of logic cells and soft-cores. The widely utilized proportional-integral-derivative (PID) algorithm is chosen as an example to demonstrate the implementation of a controller by using powerful hardware description tools.

关键词： AFM real-time control FPGA-based control law atomic force microscope atomic force microscopy embedded hardware system design embedded systems field programmable gate array field programmable gate arrays parallel computing proportional-integral- derivative algorithm three-term control

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