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Research on near-field focusing algorithm of reconfigurable reflect-array

JOURNAL OF ENGINEERING-JOE 2019年第19期2019卷 5801-5804页

作者： Liu, HongYan Zheng, Pei Wang, Chao Guo, Lei Zhang, XinYu Natl Key Lab Sci & Technol Test Phys & Numer Math Beijing Peoples R China

In this study, the near-field beam focusing algorithm of reconfigurable reflect array for security imaging application is proposed. The proposed near-field focusing algorithm is based on classic array method, which is usually adopted for far-field pattern calculation. In order to satisfy the near-field imaging application, the imaging distance is added to array method, and the improved formula can calculate the shifting phase of every array element precisely. In addition, due to discrete phase characteristic of reconfigurable reflect array, a phase choice method based on trigonometric function is used in authors' design. Based on the proposed algorithm, the shifting phase of every element is calculated and obtained the simulated beam focusing patterns. Meanwhile, the calculated shifting phase is written to whole array by field-programmable gate array, the near-field beam scanning patterns is measured and the measured results are in good agreement with the simulated ones.

关键词： field programmable gate arrays reflectarray antennas microwave imaging microwave antenna arrays security focusing antenna radiation patterns scanning antennas near-field imaging application imaging distance field-programmable gate array near-field focusing algorithm reconfigurable reflectarray near-field beam focusing algorithm security imaging

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An Implementation of Automatic and Network-Controlled Tea Bag Brewing Machine

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资讯科技国际期刊 2018年第2期12卷 45-49页

作者： Wen-Chung Tsai Ming-Hong Lu Shi-Xiang Zhu Yu-Ping Huang Ching-Yi Chen Che-Jung Kuo

In this paper, we propose an automatic tea bag brewing machine that can be remotely controlled via Internet. Functions of control were implemented by an hardware-software co-design fashion and programmed into a FPGA (field-programmable gate array) embedded system development board. Additionally, the development board was connected with several components including a 6-degree and three-dimensional rotating mechanical arm, a thermos bottle, and a water injection control circuit. As such, the proposed IoT-type tea bag brewing machine can be realized. In operation, according to different requirements, user can choose an alternative tea bag and assign different water volumes. By using a networked device such as smart-phone to send control messages to the implemented machine remotely, the mechanical arm of the machine can automatically execute the process of brewing up a cup of tea to minimize the labors' interventions periodically.

关键词： field-programmable gate array Servo Motor Mechanical Arm Internet of Things Smart-Phone Tea Bag Brewing

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Enhanced Architecture of FIR Filters Using Block Memories

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IFAC-PapersOnLine 2015年第4期48卷 306-311页

作者： Marian Pristach Vojtech Dvorak Lukas Fujcik Department of Microelectronics FEEC Brno University of Technology Czech Republic Department of Microelectronics FEEC Brno University of Technology CzechRepublic

The paper presents an enhanced architecture of finite impulse response digital filters. The proposed architecture contains one multiply-accumulate unit and random access memory to store data. The architecture utilizes serial calculation to achieve minimum requirements on area. The architecture is suitable for implementation in application specific integrated circuits and field programmable gate arrays. The main advantages of the architecture are higher operating frequency, lower power consumption and smaller area utilization in particular cases.

关键词： Digital signal processing digital filter structures finite impulse response application specific integrated circuit field-programmable gate array

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Highly Sensitive FPW-Based Microsystem for Rapid Detection of Tetrahydrocannabinol in Human Urine

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SENSORS 2017年第12期17卷 2760-2760页

作者： Lan, Je-Wei Hsieh, Chia-Hsu Huang, I-Yu Lin, Yu-Cheng Tsai, Tsung-Yi Wang, Chua-Chin Natl Sun Yat Sen Univ Dept Elect Engn Kaohsiung 80424 Taiwan Natl Cheng Kung Univ Dept Engn Sci Tainan 70101 Taiwan

This paper presents a highly sensitive flexural plate-wave (FPW)-based microsystem for rapid detection of tetrahydrocannabinol (THC) in human urine. First, a circular-type interdigital transducer (IDT) was integrated with a circular-type silicon-grooved reflective grating structure (RGS) to reduce insertion loss. Then, with lower insertion loss (-38.758 dB), the FPW device was used to develop a novel THC biosensor, and the results reveal that this FPW-THC biosensor has low detection limit (1.5625 ng/mL) and high mass-sensitivity (126.67 cm(2)/g). Finally, this biosensor was integrated with field-programmable gate array (FPGA) board and discrete components for prototyping a FPW readout system, whose maximum error was 12.378 kHz to ensure that the linearity of detection up to R-square is equal to 0.9992.

关键词： flexural plate-wave tetrahydrocannabinol circular-type interdigital transducer reflective grating structure low insertion loss field-programmable gate array readout system

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A Survey of Convolutional Neural Networks on Edge with Reconfigurable Computing

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ALGORITHMS 2019年第8期12卷 154-154页

作者： Vestias, Mario P. Inst Politecn Lisboa Inst Super Engn Lisboa INESC ID P-1500335 Lisbon Portugal

The convolutional neural network (CNN) is one of the most used deep learning models for image detection and classification, due to its high accuracy when compared to other machine learning algorithms. CNNs achieve better results at the cost of higher computing and memory requirements. Inference of convolutional neural networks is therefore usually done in centralized high-performance platforms. However, many applications based on CNNs are migrating to edge devices near the source of data due to the unreliability of a transmission channel in exchanging data with a central server, the uncertainty about channel latency not tolerated by many applications, security and data privacy, etc. While advantageous, deep learning on edge is quite challenging because edge devices are usually limited in terms of performance, cost, and energy. Reconfigurable computing is being considered for inference on edge due to its high performance and energy efficiency while keeping a high hardware flexibility that allows for the easy adaption of the target computing platform to the CNN model. In this paper, we described the features of the most common CNNs, the capabilities of reconfigurable computing for running CNNs, the state-of-the-art of reconfigurable computing implementations proposed to run CNN models, as well as the trends and challenges for future edge reconfigurable platforms.

关键词： deep learning convolutional neural network reconfigurable computing field-programmable gate array edge inference

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Design and Realization of IF Digital Receiver

Design and Realization of IF Digital Receiver

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2011 2nd Asia-Pacific Conference on Wearable Computing Systems

作者： Wang Run-qi Li Yi-hua College of Logistics Central South University of Forestry and Technology

An intermediate frequency digital receiver based on FPGA is introduced in the paper. The scheme of system realization is proposed and the design of every hardware circuit is described in detail. Every main function module in FPGA of the system is described with carefully and implementation result of every module is given. The correctness of every main function module is verified by simulation. On condition of no varying hardware platform, the system can realize different function and technical index by changing software program and have higher universality and practical value.

关键词： Digital receiver field-programmable gate array Low pass filter Digital quadrature mixing

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Convolutional Neural Network Model Compression Method for Software-Hardware Co-Design

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INFORMATION 2022年第10期13卷 451页

作者： Jang, Seojin Liu, Wei Cho, Yongbeom Konkuk Univ Dept Elect & Elect Engn Seoul 05029 South Korea Deep ET Seoul 05029 South Korea

Owing to their high accuracy, deep convolutional neural networks (CNNs) are extensively used. However, they are characterized by high complexity. Real-time performance and acceleration are required in current CNN systems. A graphics processing unit (GPU) is one possible solution to improve real-time performance;however, its power consumption ratio is poor owing to high power consumption. By contrast, field-programmable gate arrays (FPGAs) have lower power consumption and flexible architecture, making them more suitable for CNN implementation. In this study, we propose a method that offers both the speed of CNNs and the power and parallelism of FPGAs. This solution relies on two primary acceleration techniques-parallel processing of layer resources and pipelining within specific layers. Moreover, a new method is introduced for exchanging domain requirements for speed and design time by implementing an automatic parallel hardware-software co-design CNN using the software-defined system-on-chip tool. We evaluated the proposed method using five networks-MobileNetV1, ShuffleNetV2, SqueezeNet, ResNet-50, and VGG-16-and FPGA processors-ZCU102. We experimentally demonstrated that our design has a higher speed-up than the conventional implementation method. The proposed method achieves 2.47x, 1.93x, and 2.16x speed-up on the ZCU102 for MobileNetV1, ShuffleNetV2, and SqueezeNet, respectively.

关键词： convolutional neural network field-programmable gate array hardware-software co-design

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Research on the method of fast inverse realisation of Vandermonde matrix based on FPGA

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JOURNAL OF ENGINEERING-JOE 2019年第20期2019卷 6848-6851页

作者： Chen, Lei Chen, Liang Li, Bingy Beijing Inst Technol Sch Informat & Elect Radar Res Lab Beijing 100081 Peoples R China Beijing Inst Technol Beijing Key Lab Embedded Real Time Informat Proc Beijing 100081 Peoples R China

With the rapid development of science and technology, the operation and calculation in synthetic aperture radar (SAR) imaging systems require high throughput, and the system has high requirement for real-time performance. At the same time, in the SAR imaging technology, many Vandermonde matrix inversion operations are used in places where the weight coefficients are calculated. Especially when multi-channel inverse filtering is performed, the use of the Vandermonde matrix inversion operation is a crucial step. In this study, the authors worked hard to find a high speed and accurate Vandermonde matrix inversion algorithm for complex SAR imaging systems. Considering the field-programmable gate array (FPGA) can be parallel computing and its computing speed is high, the authors chose FPGA to achieve a large number of Vandermonde matrix inversion calculation, and it can meet the requirements of high speed and real time. So, first the realisation method of the fast inversion of the Vandermonde matrix based on Lagrange interpolation polynomial is discussed in this study, which includes preprocessing module, u matrix calculation module, v matrix calculation module, p' vector calculation module and post-processing module. Then, the simulation results of the design are compared and analysed, which proved the correctness and feasibility of the rapid inversion method of Vandermonde matrix.

关键词： radar imaging field programmable gate arrays polynomials matrix inversion interpolation synthetic aperture radar Lagrange interpolation polynomial field-programmable gate array u matrix calculation module fast inverse realisation method π′ vector calculation module rapid inversion method post-processing module v matrix calculation module fast inversion Vandermonde matrix inversion calculation complex SAR imaging systems accurate Vandermonde matrix inversion algorithm multichannel inverse filtering Vandermonde matrix inversion operation SAR imaging technology real-time performance synthetic aperture radar imaging systems FPGA

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High-resolution FPGA-pulse width modulation applied to PFC 2MHz converter using eGaN field effect transistor

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JOURNAL OF ENGINEERING-JOE 2019年第17期2019卷 4205-4208页

作者： Arbugeri, Jose Augusto Arbugeri, Cesar Augusto Mussa, Samir Ahmad Fed Univ Santa Catarina UFSC Elect & Elect Engn Dept Power Elect Inst INEP BR-88040970 Florianopolis SC Brazil

This study proposes an implementation based on a low-cost field-programmable gate array (FPGA) of a high-resolution pulse width modulation applied on a single-phase power factor correction (PFC) converter operating with 2MHz switch frequency. The PFC was implemented using a half-bridge enhancement-mode Gallium Nitride (eGaN) field effect transistor with on-board gate drives (EPC9003 development board) and the MAX10 FPGA.

关键词： field programmable gate arrays power factor correction PWM power convertors switching convertors gallium compounds III-V semiconductors wide band gap semiconductors field effect transistor circuits bridge circuits GaN frequency 2 0 MHz EPC9003 development board half-bridge field effect transistor PFC converter switch frequency field-programmable gate array high-resolution FPGA-pulse width modulation MAX10 FPGA on-board gate drives single-phase power factor correction converter

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High-performance digital image filtering architectures in the residue number system based on the Winograd method

COMPUTER OPTICS

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COMPUTER OPTICS 2022年第5期46卷 752-+页

作者： Valueva, M. V. Lyakhov, P. A. Nagornov, N. N. Valuev, G. V. FSAEI HE North Caucasus Fed Univ Pushkina 1 Stavropol 355017 Russia

Continuous improvement of methods for visual information registration, processing and storage leads to the need of improving technical characteristics of digital image processing systems. The paper proposes new high-performance digital filter architectures for image processing by the Winograd method with calculations performed in a residue number system with special-type moduli. To assess the performance and hardware costs of the proposed architectures, hardware simulation is carried out using a field-programmable gate array in a computer-aided design environment Xilinx Vivado 2018.3 for the target device Artix-7 xc7a200tffg1156-3. The results of hardware simulation show that the proposed filter architectures have 1.13 - 5.42 times higher performance, but require more hardware costs compared to the known methods. The results of this study can be used in the design of complex systems for image processing and analysis for their performance to be increased.

关键词： digital filters image processing residue number system Winograd filtering method field-programmable gate array

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