We revisit the well-known research topic of landmark-based compact routing in order to support designing interconnection topologies that can meet new demanding requirements and issues brought up by advances in areas s...
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ISBN:
(纸本)9781538693131
We revisit the well-known research topic of landmark-based compact routing in order to support designing interconnection topologies that can meet new demanding requirements and issues brought up by advances in areas such as massively parallel computing or large-scale data centers. Particularly, it is necessary to reduce the routing table size (RTS) as much as possible while maintaining other performance factors in a good state. Based on a new landmark selection technique, we propose our Geographic Landmark-based Compact routing scheme which can reduce the RTS from the well-known Thorup and Zwick's scheme by roughly 15% for a network of 1024 nodes and roughly 45% for a network of at least 100K nodes, and which also produces shorter average path length.
Nodes of wireless sensor networks need simple and effective cluster heads selection algorithms to balance the energy dissipation because of the limited processing capacity and energy. This article proposed a cluster h...
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Nodes of wireless sensor networks need simple and effective cluster heads selection algorithms to balance the energy dissipation because of the limited processing capacity and energy. This article proposed a cluster heads selection algorithm based on cluster notes number----CNN-LEACH, which is improved on classic algorithm LEACH. In order to balance the energy dissipation, if a node has been a cluster head already, it temporarily can not be a cluster head again several rounds afterward. The rounds are decided by cluster nodes number. The algorithm is straightforward, even without considering the residual energy and position information. But it significantly reduces the network energy consumption by using the threshold between 0 and 1 to control the effect of energy dissipation on the final round that one node should not be a cluster head. At the same time, it avoids the significant fluctuation in the number of cluster heads. Simulations and analysis results show that the algorithm can extend the lifetime of the network.
In order to better apply the AODV routing protocol to the mine wireless ad-hoc network,this thesis proposes an improved routing *** on the AODV routing protocol choosing the minimum hops path as the routing path,the a...
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In order to better apply the AODV routing protocol to the mine wireless ad-hoc network,this thesis proposes an improved routing *** on the AODV routing protocol choosing the minimum hops path as the routing path,the algorithm adds the consideration of node congestion and residual energy,and designs a new hops count *** method divides different degrees of node congestion and energy consumption into different levels and determines hops according to different *** simulation results show that N-AODV protocol has excellent performance close to AODV protocol and can meet the requirements of mine wireless adhoc network.
Many articles deal with the problem of maintaining a rooted shortest-path tree. However, after some edge deletions, some nodes can be disconnected from the connected component V-r of some distinguished node r. In this...
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Many articles deal with the problem of maintaining a rooted shortest-path tree. However, after some edge deletions, some nodes can be disconnected from the connected component V-r of some distinguished node r. In this case, an additional objective is to ensure the detection of the disconnection by the nodes that no longer belong to Vr. We present a detailed analysis of a silent self-stabilizing algorithm. We prove that it solves this more demanding task in anonymous weighted networks with the following additional strong properties: it runs without any knowledge on the network and under the unfair daemon, that is without any assumption on the asynchronous model. Moreover, it terminates in less than 2n + D rounds for a network of n nodes and hop-diameter D. (C) 2019 Published by Elsevier Inc.
The optical network on chip (ONoC) paradigm has emerged as a promising solution to multi-core/many-core processor systems for offering enormous bandwidth and low power consumption. As chip multiprocessors (CMPs) scale...
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The optical network on chip (ONoC) paradigm has emerged as a promising solution to multi-core/many-core processor systems for offering enormous bandwidth and low power consumption. As chip multiprocessors (CMPs) scale to unprecedented numbers of cores, the performance of next-generation CMPs will be bounded by the process yield and power density of single chip. In earlier work we proposed a multi-chip ONoC architecture that scales to large numbers of CMPs and delivers high performance in terms of delay and throughout. Building on that work, in this paper we propose an optimized architecture for integrating a large number of cores into chips with a novel control strategy, including a contention resolution scheme and a resource reservation scheme. The proposed control strategy is crucial to large scale ONoCs, because the resource reservation scheme ensures efficient wavelength allocation for the traffic while the contention management scheme is effective in reducing the impact of contentions. To sustain good performance and energy efficiency of large-scale ONoC, the topology is optimized to reduce the average transmission distance with minimum increase of power consumption. We evaluate the proposed architecture within a 1000-core processor system and compare it with CMesh and several previously proposed topologies with different control strategies. The simulation results show that, our new large-scale architecture can achieve better performance on throughput and delay.
An optical network based on elastic optical switches allows requests using different spectrum widths to improve utilisation efficiency. This study considers one three-stage WSW (waveband switching-space switching-wave...
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An optical network based on elastic optical switches allows requests using different spectrum widths to improve utilisation efficiency. This study considers one three-stage WSW (waveband switching-space switching-waveband switching), optical node architecture for elastic optical networks. A sufficient condition for a rearrangeable non-blocking WSW architecture with limited input/output links has been derived in an earlier work. In this study, the author improves the upper bound by adopting a new interstage link partition scheme associated with a tricky routing algorithm. Suppose a WSW architecture has r input/output links each of which has n frequency slot units (FSUs). Compared with earlier results, the results of the proposed scheme show that s - 1 (or 3s - 4) FSUs per interstage link can be reduced for even (or odd) min{r, n}, where s = min{ left ceiling r/2 right ceiling , left ceiling n/2 right ceiling }. The reduction gain is at least 3.5% (or 10%) for even (or odd) min{r, n} if r = n <= 26, even achieving 23.3% for limited odd r = n.
Transmission loss allocation in a restructured power system is vital in today's electricity market around the world. The problem of transmission loss allocation among the various participants is getting more atten...
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Transmission loss allocation in a restructured power system is vital in today's electricity market around the world. The problem of transmission loss allocation among the various participants is getting more attention with the increase of the competition level in electricity markets. In this paper, a novel routing algorithm with minimum transmission loss is proposed for judicious allocation of transmission losses over a network. Proposed routing algorithm computes the power flow path through transmission line from the individual generator to load utilizing the shortest path with minimum loss criterion. The load demand is fulfilled with the power flow through the decisively selected transmission path. The new method of transmission loss allocation has distinct advantages over existing methods as locational dependence of loss allocation to both generator and load. The proposed algorithm is implemented on IEEE-30 bus system. The experimental results are obtained with proposed routing algorithm and compared with existing method. Results obtained using proposed method illustrate significant improvements in reducing the transmission losses.
作者:
Zhang, ZhenHuang, Shu-qiangGuo, DongLi, Yong-HuiJinan Univ
Dept Comp Sci Guangzhou 510632 Guangdong Peoples R China Jilin Univ
Minist Educ Lab Symbol Computat & Knowledge Engn Changchun 130012 Jilin Peoples R China Jinan Univ
Dept Optoelect Engn Guangzhou 510632 Guangdong Peoples R China Univ Sydney
Sch Elect & Informat Engn Sydney NSW 00026A Australia
The CCC(r, n) network is an extension of the hypercube which replaces each vertex with a cycle of length n, providing that the hypercube is r-dimensional. When n > r, the CCC(r, n) network contains more vertices th...
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The CCC(r, n) network is an extension of the hypercube which replaces each vertex with a cycle of length n, providing that the hypercube is r-dimensional. When n > r, the CCC(r, n) network contains more vertices than that of CCC(r, r), which makes it more useful in the construction of a large-scale interconnection network. However, the CCC(r, n) is irregular when n > r, which makes their properties difficult to be analyzed. In this paper, we propose a new variational network of the cube-connected cycles (RVCCC). The RVCCC networks have the properties of regularity, vertex-symmetry, and low diameter. Compared with the general CCC networks, the RVCCC networks are more suitable for constructing a large-scale interconnection network. After the shortest internode distance between any two vertices in the RVCCC was determined, the exact diameter of this network was calculated and the communication algorithms, including the routing algorithm and the broadcasting algorithm, were also developed. (C) 2018 Elsevier B.V. All rights reserved.
In order to overcome limitations of traditional electronic interconnects in terms of power efficiency and bandwidth density, optical networks-on-chip (NoC) based on silicon photonics have been proposed as an emerging ...
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In order to overcome limitations of traditional electronic interconnects in terms of power efficiency and bandwidth density, optical networks-on-chip (NoC) based on silicon photonics have been proposed as an emerging on chip communication architecture for chip multiprocessors (CMPs) with large core counts. However, due to thermo-optic effects, wavelength-selective silicon photonic devices such as microresonators suffer from temperature-dependent wavelength shift. In this work, we propose a thermal-sensitive design of a 3D torus-based optical NoC architecture. For the 3D torus-based optical NoC architecture, we propose a hybrid optical-electronic router architecture with a fully-connected 7 x 7 optical switching fabric. Besides, a thermal-sensitive routing algorithm is proposed to optimize the optical power loss in the presence of on-chip temperature variations. Simulation results show that for a set of synthetic traffic patterns, the proposed 3D torus-based optical NoC with the thermal-sensitive routing reduces the average thermal-induced optical power loss by 14.3% and 17% respectively as compared to the matched 3D torus-based optical NoC and the 3D mesh-based optical NoC with the traditional XYZ routing. For a set of real applications, the proposed 3D torus-based optical NoC with the thermal sensitive routing reduces the worst-case optical power loss by 7.9% and 14.6% respectively as compared to the matched 3D torus-based optical NoC and the 3D mesh-based optical NoC with the traditional XYZ routing.
Stacking technology is an approach to improve scalability of 2D network-on-chip systems. 3D stacking technology places multiple chips vertically, while silicon chips are stacked side-by-side on a silicon interposer la...
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Stacking technology is an approach to improve scalability of 2D network-on-chip systems. 3D stacking technology places multiple chips vertically, while silicon chips are stacked side-by-side on a silicon interposer layer in the 2.5D stacking technology. 2.5D stacking can solve many of the 3D stacking difficulties such as thermal problem. The cores in the processing element (PE) layer must have the ability to connect together. Moreover, the connection between the processing cores and the other chips is a critical issue that should be concerned. The memory chip is one of the most important chips, integrated with the many-core chip. The network-on-chip can be extended to the interposer layer to increase the usability of the interposer layer. It is essential to have an efficient topology and deadlock-free routing algorithm to handle operations effectively and decrease delay and power consumption. In this paper, a new topology called "Balanced Mesh" and a deadlock-free routing algorithm is recommended that balances fairly the connection between different Mesh-based segments of a network. Many of interposer network topologies such as Butter Donut increase the degree of intermediate routers in the interposer layer or nodes related to other chips. Many of them cannot be easily used in the PE layer to have a uniform system. The proposed topology can be simply applied to both of many-core layer and the interposer layer to decrease delay and power consumption without any change in the degree of nodes and has lesser number of links. Our proposed topology is compared with some other topologies such as concentrated Mesh(CMesh) and ButterDount. Simulation results show that our proposed topology can improve the system efficiency with lesser number of links. Using our proposed topology in both layers achieves 13% improvement in network latency compared with using Mesh in the PE layer and ButterDonut in the interposer layer. Also, it achieves 12% improvement in power consumption.
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