作为未来对于物体的识别技术,射频识别在人们生活中占有越来越重要的地位.这项技术将不断深入社会生活,在人们周围无处不在.由于这项技术的广泛应用,它的安全性以及涉及到个人生活的隐私问题不得不引起各界的关注.最初考虑到读卡器和标签之间通讯的可视性以及因特网络潜在的诸多攻击,研究者主要针对读卡器和后端数据库的通讯安全问题,做出了很多的工作.随着UHF标签的推行,读卡器和射频标签通讯范围增大,它们之间的通讯不再安全.本文针对读卡器和标签之间通讯中可能受到的攻击进行分析,建立了一个保证它们通讯安全的模型,依据该模型对EPC C lass1 G en2(EPC C 1G 2)协议进行分析,指出了协议可能受到的攻击,并提出了具有身份验证功能的协议修改方案.
A 16bit sigma-delta audio analog-to-digital converter is *** consists of an analog modulator and a digital decimator.A standard 2-order single-loop architecture is employed in the *** stabilization is applied to the f...
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A 16bit sigma-delta audio analog-to-digital converter is *** consists of an analog modulator and a digital decimator.A standard 2-order single-loop architecture is employed in the *** stabilization is applied to the first integrator to eliminate the 1/f noise.A low-power,area-efficient decimator is used,which includes a poly-phase comb-filter and a *** converter achieves a 92dB dynamic range over the 96kHz audio *** single chip occupies 2.68mm2 in a 0.18μm six-metal CMOS process and dissipates only 15.5mW power.
A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0....
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A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0. 35μm mixed-signal technology. Measurements demonstrate that the temperature coefficient is ± 36. 3ppm/℃ from 0 to 100℃ when the Vid inputs are *** the supply voltage is varied from 2.7 to 5V, the voltage reference varies by about 5mV. The maximum glitch of the transient response is about 20mV at 125kHz. Depending on the state of the five Vid inputs,an output voltage between 1.1 and 1.85V is programmed in increments of 25mV.
在分析传统环形振荡器的基础上,设计了一种新型高频、低噪声环形振荡器.采用改进的全开关状态的延时单元和双重反馈环结构,克服了传统环形振荡器振荡频率低、噪声性能差的缺点,可以有效抑制PVT(Pro-cess Voltage Temperature)偏差对频...
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在分析传统环形振荡器的基础上,设计了一种新型高频、低噪声环形振荡器.采用改进的全开关状态的延时单元和双重反馈环结构,克服了传统环形振荡器振荡频率低、噪声性能差的缺点,可以有效抑制PVT(Pro-cess Voltage Temperature)偏差对频率的影响.采用TSMC0.18μm CMOS工艺参数,电源电压1.8V,功耗为37.5mW.仿真得到在振荡器中心频率为4GHz时的单边带相位噪声为95.6dBc/Hz@1MHz.
本软件系统是适用于第一款国产可编程逻辑器件FDP100K(FDP:FPGA for Data-Path)的实用软件开发系统.该软件系统中的各模块针对FDP100K硬件结构提出新的实现算法,尤其是后端的工艺映射和布局布线两个模块.经过完整软硬件协同测试表明:该...
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本软件系统是适用于第一款国产可编程逻辑器件FDP100K(FDP:FPGA for Data-Path)的实用软件开发系统.该软件系统中的各模块针对FDP100K硬件结构提出新的实现算法,尤其是后端的工艺映射和布局布线两个模块.经过完整软硬件协同测试表明:该软件系统各模块功能正确,与总控模块接口正确,与硬件对应接口正确,能高效正确地实现数据通路领域电路和其他类型电路的功能.
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