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2023 IEEE International Conference on Big Data, BigData 2023

作者： Kato, Taiki Yamagiwa, shinichi Wada, Koichi Master's Program in Computer Science Degree Program in Systems and Information Engineering University of Tsukuba Ibalaki Tsukuba Japan University of Tsukuba Faculty of Engineering Information and Systems Ibalaki Tsukuba Japan

ISBN: (纸本)9798350324457

IoT edge platform has become popular in various distributed environments. The edge devices need to communicate BigData among them or with the cloud servers by collaborating with AI technologies for finding events from the applications. Those devices exchange data streams from such as distributed sensors and remote image/video devices. We focus on an acceleration technique for the communication performance using a stream-based lossless data compression technology. This paper proposes a parallelization technique for the compression process in a software environment running on a multicore processor. The technique invokes concurrent compression processes assigned to multiple threads with splitting a data stream to chunks. The paper exposes three scheduling methods for assigning the chunks to the threads: in-order, hybrid and out-of-order. As an original data order of chunks must be obtained in decompression side, the proposed technique introduces packeting mechanisms in each chunk by adding headers to support the scheduling methods. Through experimental performance evaluations, we discuss the packeting overhead focusing on compression ratio and speedup by the parallelization with three scheduling methods. © 2023 IEEE.

关键词： Data stream IoT Lossless Data Compression Multi-Threading Parallelization

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Performance Enhancement of stream-Based Decompression Process by Notifying Compression Buffer size 28

Performance Enhancement of Stream-Based Decompression Proces...

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28th IEEE symposium on computers and Communications, IsCC 2023

作者： Kato, Taiki Yamagiwa, shinichi Marumo, Koichi University of Tsukuba Master's Program in Computer Science Degree Program in Systems and Information Engineering Ibalaki Tsukuba Japan University of Tsukuba Faculty of Engineering Information and Systems Ibalaki Tsukuba Japan

ISBN: (纸本)9798350300482

This paper focuses on a performance enhancement of communication performance by compressing data stream. AsE coding is an effective lossless data compression method for data stream. The software implementation of the coding/decoding method inevitably meets a performance mismatch in memory and storage devices. In the compressor side, it is predictable to decide the size of an original data block and is available to process a flexible buffer memory. However, the decompressor is not able to predict the buffer size because the original data size is not obvious before the decompression. This causes a performance mismatch in the filesystem level. This paper proposes a novel method to address the performance mismatch by applying a notification mechanism of compression size from the compressor. This paper describes the mechanism focusing on the system call usage. Through experimental evaluations, we show the performance improvement of the decompression performance for handling data stream. © 2023 IEEE.

关键词： Virtual storage

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Implementation and Performance Evaluation of Collective Communications Using CIRCUs on Multiple FPGAs

Implementation and Performance Evaluation of Collective Comm...

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2023 International Conference on High Performance Computing in Asia-Pacific Region Workshops, HPC Asia 2023

作者： Kikuchi, Kohei Fujita, Norihisa Kobayashi, Ryohei Boku, Taisuke Master's Program in Computer Science Degree Programs in Systems and Information Engineering Graduate School of Science and Technology University of Tsukuba Tsukuba Japan Center for Computational Sciences University of Tsukuba Tsukuba Japan

ISBN: (纸本)9781450399890

In the high-performance computing domain, Field Programmable Gate Array (FPGA) is a novel accelerator that exhibits high flexibility and performance characteristics distinct from other accelerators such as the Graphics Processing Unit (GPU). Recent advanced high-end FPGA is equipped with multiple channels of high speed optical link up to 100Gbps performance for each. This is a crucial feature when we construct PC clusters with FPGAs as accelerators, however it is not easy to utilize from user kernels because this feature is implemented in low level and simple direct communication between neighboring FPGAs. In order to provide the communication feature between FPGAs for accelerated PC clusters, we developed a communication system named CIRCUs which implies a user-friendly API from OpenCL and is equipped with routing function over multi-hop communication on multi-dimensional torus network of FPGAs. However, current CIRCUs only provides a point-to-point communication between source and destination FPGAs. In ordinary parallel processing environment such as MPI, the user program the message passing with various collective communication functions for parallel algorithm, for instance Allreduce, Allgather, etc. In this paper, we implement the collective communication function over CIRCUs for user-friendly programming of ordinary parallel algorithms on FPGAs. As the first target, we implement Allreduce function which is the most essential and important function. The paper describes the CIRCUs system briefly followed by the design, implementation and preliminary performance evaluation on Intel stratix10 FPGAs. © 2023 ACM.

关键词： Field programmable gate arrays (FPGA)

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A Design study on Integrated Complex Coefficient Filters with Peripheral Circuits for Accurate Frequency Response Measurement

IEEJ Transactions on Electronics, Information and Systems

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IEEJ Transactions on Electronics, Information and systems 2025年第1期145卷 16-24页

作者： shouno, Kazuhiro sato, Lina Fukagawa, Kanta Tanimoto, Hiroshi Muto, Cosy Division of Information Engineering University of Tsukuba 1-1-1 Tennoudai Ibaraki Tsukuba305-8573 Japan Graduate School of Science and Technology Degree Programs in Systems and Information Engineering Master’s Program in Computer Science University of Tsukuba Japan Kitami Institute of Technology 165 Koen-cho Hokkaido Kitami090-8507 Japan Faculty of Education Nagasaki University 1-14 Bunkyo-machi Nagasaki852-8521 Japan

This paper proposes a measurement technique for an integrated complex filter. The proposed method is based on two measurement methods with integrated circuitry for calibration. It is accomplished by applying square waves to an FUT (Filter Under Test) instead of sinusoidal waves or by superposing transfer characteristics obtained by applying a single sinusoidal wave to an FUT. In both of the above methods, the output signal connected to the external measurement equipment via a 50 Ω coaxial cable and so on. In this case, the output signal of the FUT should be amplified by internal or external amplifiers, which degrades the response. However, it is cancelled out by the proposed calibration circuitry with some analog switches. In addition to the above, for the RC polyphase filter, the source resistance and the load capacitance degrade the measurement results and their effect is discussed. The validity of the proposal is confirmed through computer simulation for a third-order RCPF whose passband is 8–40 MHz fabricated by Phenitec 0.6 µm CMOs process. It is shown that the measurement error is −1.10 dB for the square-wave method and −1.00 dB and −0.43 degrees for the superposition method at 40 MHz. © 2025 The Institute of Electrical Engineers of Japan.

关键词： Capacitance

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CAMRI Loss: Improving the Recall of a specific Class without sacrificing Accuracy

CAMRI Loss: Improving the Recall of a Specific Class without...

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作者： Nishiyama, Daiki Fukuchi, Kazuto Akimoto, Youhei sakuma, Jun Master's Program in Computer Science Degree Programs in Systems and Information Engineering Graduate School of Science and Technology University of Tsukuba Tsukuba-shi305-8577 Japan RIKEN Center for Advanced Intelligence Project Tokyo103-0027 Japan Department of Computer Science Faculty of Engineering Information and Systems University of Tsukuba Tsukuba-shi305-8577 Japan

In real world applications of multiclass classification models, misclassification in an important class (e.g., stop sign) can be significantly more harmful than in other classes (e.g., no parking). Thus, it is crucial to improve the recall of an important class while maintaining overall accuracy. For this problem, we found that improving the separation of important classes relative to other classes in the feature space is effective. Existing methods that give a class-sensitive penalty for cross-entropy loss do not improve the separation. Moreover, the methods designed to improve separations between all classes are unsuitable for our purpose because they do not consider the important classes. To achieve the separation, we propose a loss function that explicitly gives loss for the feature space, called class-sensitive additive angular margin (CAMRI) loss. CAMRI loss is expected to reduce the variance of an important class due to the addition of a penalty to the angle between the important class features and the corresponding weight vectors in the feature space. In addition, concentrating the penalty on only the important class hardly sacrifices separating the other classes. Experiments on CIFAR-10, GTsRB, and AwA2 showed that CAMRI loss could improve the recall of a specific class without sacrificing accuracy. In particular, compared with GTsRB's second-worst class recall when trained with cross-entropy loss, CAMRI loss improved recall by 9%. © 2023 The Institute of Electronics, Information and Communication Engineers.

关键词： Deep learning

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Preliminary Evaluation of Kyokko for Inter-FPGA Communication Framework CIRCUs

Preliminary Evaluation of Kyokko for Inter-FPGA Communicatio...

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IEEE International Conference on Cluster Computing Workshops and Posters (CLUsTER WORKsHOPs)

作者： Kaito Kitazume Norihisa Fujita Ryohei Kobayashi Taisuke Boku Master's Program in Computer Science Degree Programs in Systems and Information Engineering Graduate School of Science and Technology University of Tsukuba Center for Computational Sciences University of Tsukuba

In recent years, Field-Programmable Gate Arrays (FPGAs) are gaining attention as computational acceleration devices in the field of high-performance computing. By implementing specialized circuits that can be customiz... 详细信息

ISBN: (数字)9798350383454

ISBN: (纸本)9798350383461

关键词： Conferences High performance computing Circuits Cluster computing Low latency communication Field programmable gate arrays

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Using sYCLomatic to Migrate CUDA Code to oneAPI Adapting NVIDIA GPU

Using SYCLomatic to Migrate CUDA Code to oneAPI Adapting NVI...

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IEEE International Conference on Cluster Computing Workshops and Posters (CLUsTER WORKsHOPs)

作者： Wentao Liang Norihisa Fujita Ryohei Kobayashi Taisuke Boku Master's Program in Computer Science Degree Program in Systems and Information Engineering Graduate School of Science and Technology University of Tsukuba Center for Computational Sciences University of Tsukuba

ISBN: (数字)9798350383454

ISBN: (纸本)9798350383461

Nowadays, the use of accelerators in high performance computing has become more common than ever before. The most used accelerators must be the Graphics Processing Unit (GPU). It has emerged as an important component in most of the parallel computing scenarios, surpassing the capabilities of the traditional Central Processing Unit (CPU) in perspective of both performance and energy efficiency.

关键词： Codes Conferences High performance computing Graphics processing units Cluster computing Parallel processing Energy efficiency Central Processing Unit

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Implementation and Evaluation of 0.6 µm CMOs Complex RCPF for Accurate Frequency Response Measurement

IEEJ Transactions on Electronics, Information and Systems

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IEEJ Transactions on Electronics, Information and systems 2025年第1期145卷 25-37页

作者： sato, Lina Fukagawa, Kanta shouno, Kazuhiro Tanimoto, Hiroshi Muto, Cosy Moriyama, seijiro Takahashi, Chikau Yoshino, Michitaka Graduate School of Science and Technology Degree Programs in Systems and Information Engineering Master’s Program in Computer Science University of Tsukuba Japan Division of Information Engineering University of Tsukuba 1-1-1 Tennoudai Ibaraki Tsukuba305-8573 Japan Kitami Institute of Technology 165 Koen-cho Hokkaido Kitami090-8507 Japan Faculty of Education Nagasaki University 1-14 Bunkyo-machi Nagasaki852-8521 Japan Anagix Corporation 3-22-27 Numama Kanagawa Zushi249-0004 Japan Takamori Corporation Japan Research Center for Micro-Nano Technology Hosei University 3-11-15 Midori-cho Koganei Tokyo184-0003 Japan

This paper describes the implementation and evaluation of an RC polyphase filter (RCPF) and circuitry for measuring its frequency characteristics. The integrated circuit is fabricated on a 0.6 µm CMOs process and its supply voltage is 5 V. The integrated circuit includes a filter under test (FUT), a four-phase square wave generator, several analog switches and differential amplifiers to amplify the high-impedance signals of the RCPF. This FUT is a third-order complex RCPF whose passband is 8 − 40 MHz. This paper describes the design of these circuits in detail. This integrated circuit can select two measurement methods by means of external control signals. The first method uses a four-phase square wave. The frequency characteristics are measured by using an on-chip four-phase square wave generator driven by an external clock generator and by a spectrum analyzer tuned to the fundamental frequency. The second method uses an external network analyzer. Furthermore, this integrated circuit is equipped with a calibration circuit to measure the frequency characteristics of the circuitry except FUT by passing through the input / output signals of the FUT. As a result, the frequency characteristics of the FUT itself can be accurately measured. The effectiveness is confirmed through evaluation of the fabricated integrated circuit. © 2025 The Institute of Electrical Engineers of Japan.

关键词： Differential amplifiers

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Performance Enhancement of stream-Based Decompression Process by Notifying Compression Buffer size

Performance Enhancement of Stream-Based Decompression Proces...

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IEEE symposium on computers and Communications (IsCC)

作者： Taiki Kato shinichi Yamagiwa Koichi Marumo Master's Program in Computer Science Degree Program in Systems and Information Engineering University of Tsukuba Tsukuba Ibalaki Japan Faculty of Engineering Information and Systems University of Tsukuba Tsukuba Ibalaki Japan

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Toward Parallelization Technique for stream-based Lossless Data Compression

Toward Parallelization Technique for Stream-based Lossless D...

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IEEE International Conference on Big Data

作者： Taiki Kato shinichi Yamagiwa Koichi Wada Master’s Program in Computer Science Degree Program in Systems and Information Engineering University of Tsukuba Tsukuba Ibalaki Japan Faculty of Engineering Information and Systems University of Tsukuba Tsukuba Ibalaki Japan

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