The usage of machine learning and deep learning algorithms have necessitated Artificial Intelligence'. AI is aimed at automating things by limiting human interference. It is widely used in IT, healthcare, finance,...
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Concept drift presents a formidable hurdle in the implementation of machine learning models in practical scenarios, owing to the potential changes in underlying data distributions over time. The timely detection and e...
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As memory corruption vulnerabilities evolve, attackers have shifted focus from traditional control-flow attacks to non-control data attacks, which manipulate data influencing a program′s behavior without altering its...
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The covariance matrix adaptive evolution strategy (CMA-ES) has been widely used in the field of 2D/3D registration in recent years. This optimization method exhibits exceptional robustness and usability for complex su...
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As per WHO calculation of deaths, globally due to Breast Cancer is around one million. Breast cancer can be cured by early detection, in which abnormal breast cells proliferate uncontrollably, leading to tumor formati...
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The long COVID-19 pandemic has limited the activities of Ruang Publik Terpadu Ramah Anak (RPTRA) such as environment cleaning, repair of RPTRA infrastructure, learning and others, as well as the lack of public awarene...
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We design new parallel algorithms for clustering in high-dimensional Euclidean spaces. These algorithms run in the Massively Parallel Computation (MPC) model, and are fully scalable, meaning that the local memory in e...
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This article designs a 14-bit successive approximation register analog-to-digital converter(SAR ADC).A novel digital bubble sorting calibration method is proposed and applied to eliminate the effect of capacitor mis...
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This article designs a 14-bit successive approximation register analog-to-digital converter(SAR ADC).A novel digital bubble sorting calibration method is proposed and applied to eliminate the effect of capacitor mismatch on the linearity of the SAR ADC. To reduce the number of capacitors, a hybrid architecture of a high 8-bit binary-weighted capacitor array and a low 6-bit resistor array is adopted by the digital-to-analog(DAC). The common-mode voltage VCM-based switching scheme is chosen to reduce the switching energy and area of the DAC. The time-domain comparator is employed to obtain lower power consumption. Sampling is performed through a gate voltage bootstrapped switch to reduce the nonlinear errors introduced when sampling the input signal. Moreover, the SAR logic and the whole calibration is totally implemented on-chip through digital integrated circuit(IC) tools such as design compiler, IC compiler, etc. Finally, a prototype is designed and implemented using 0.18 μm bipolar-complementary metal oxide semiconductor(CMOS)-double-diffused MOS 1.8 V CMOS technology. The measurement results show that the SAR ADC with on-chip bubble sorting calibration method achieves the signal-to-noise-and-distortion ratio of 69.75 dB and the spurious-free dynamic range of 83.77 dB.
The microservices are continuously growing in domains of communication using cloud and AI. Access to microservice can be done using any respective cloud environment. Access microservices using cloud require multiple c...
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The logistics sector serves as a vital artery in global trade, with freight forwarders facilitating the movement of goods from source to destination. However, the accuracy of freight billing remains a persistent chall...
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