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14-Bit SAR ADC with on-Chip Digital Bubble Sorting Calibration Technology

Chinese Journal of Electronics 2025年第1期34卷 125-136页

作者： Hua Fan Zhuorui Chen Tongrui Xu Franco Maloberti Qi Wei Quanyuan Feng School of Integrated Circuit Science and Engineering(Exemplary School of Microelectronics) University of Electronic Science and Technology of China Shenzhen Institute for Advanced Study University of Electronic Science and Technology of China Chongqing Institute of Microelectronics Industry Technology University of Electronic Science and Technology of China Department of Electrical Computer and Biomedical Engineering University of Pavia Department of Precision Instrument Tsinghua University Institute of Microelectronics Southwest Jiaotong University

This article designs a 14-bit successive approximation register analog-to-digital converter（SAR ADC）.A novel digital bubble sorting calibration method is proposed and applied to eliminate the effect of capacitor mismatch on the linearity of the SAR ADC. To reduce the number of capacitors, a hybrid architecture of a high 8-bit binary-weighted capacitor array and a low 6-bit resistor array is adopted by the digital-to-analog（DAC）. The common-mode voltage VCM-based switching scheme is chosen to reduce the switching energy and area of the DAC. The time-domain comparator is employed to obtain lower power consumption. Sampling is performed through a gate voltage bootstrapped switch to reduce the nonlinear errors introduced when sampling the input signal. Moreover, the SAR logic and the whole calibration is totally implemented on-chip through digital integrated circuit（IC） tools such as design compiler, IC compiler, etc. Finally, a prototype is designed and implemented using 0.18 μm bipolar-complementary metal oxide semiconductor（CMOS）-double-diffused MOS 1.8 V CMOS technology. The measurement results show that the SAR ADC with on-chip bubble sorting calibration method achieves the signal-to-noise-and-distortion ratio of 69.75 dB and the spurious-free dynamic range of 83.77 dB.

关键词： Semiconductor device measurement Capacitors Linearity Switches Calibration System-on-chip Frequency measurement Time-domain analysis Sorting Signal to noise ratio

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Hybrid tri-memristor hyperchaotic map and application in Wasserstein Generative Adversarial Nets

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Science China(Technological Sciences) 2024年第6期67卷 1855-1865页

作者： GU Yang BAO Han YU XiHong HUA ZhongYun BAO BoCheng XU Quan School of Microelectronics and Control Engineering Changzhou UniversityChangzhou213159China School of Computer Science and Technology Harbin Institute of TechnologyShenzhen518055China

Inspired by basic circuit connection methods,memristors can also be utilized in the construction of complex discrete chaotic *** investigate the dynamical effects of hybrid memristors,we propose two hybrid tri-memristor hyperchaotic(HTMH)mapping structures based on the hybrid parallel/cascade and cascade/parallel operations,*** the HTMH mapping structure with hybrid parallel/cascade operation as an example,this map possesses a spatial invariant set whose stability is closely related to the initial states of the *** distributions and bifurcation behaviours dependent on the control parameters are explored with numerical ***,the memristor initial offset-boosting mechanism is theoretically demonstrated,and memristor initial offset-boosting behaviours are numerically *** results clarify that the HTMH map can exhibit hyperchaotic behaviours and extreme multistability with homogeneous coexisting infinite *** addition,an FPGA hardware platform is fabricated to implement the HTMH map and generate pseudorandom numbers(PRNs)with high ***,the generated PRNs can be applied in Wasserstein generative adversarial nets(WGANs)to enhance training stability and generation capability.

关键词： memristor hybrid tri-memristor map spatial invariant set hyperchaos extreme multistability generative adversarial nets

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Analyzing Local RISC-V Interrupt Latencies with Virtual Prototyping 27

Analyzing Local RISC-V Interrupt Latencies with Virtual Prot...

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27. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, MBMV 2024 - 27th Workshop on Methods and Description Languages ??for Modeling and Verification of Circuits and Systems, MBMV 2024

作者： Hauser, Robert Steffen, Lukas Grützmacher, Florian Haubelt, Christian Institute of Applied Microelectronics and Computer Engineering University of Rostock Germany

ISBN: (纸本)9783800762682

The gem5 simulator is a state-of-the-art tool for modeling RISC-V processors. It offers simulation at the microarchitectural level. Thereby, it enables not only functional testing but evaluation of extra-functional system properties like timing or energy efficiency. Since embedded systems often interact with their peripherals using interrupts, these properties play a crucial role in evaluating overall platform performance. Currently, gem5 only supports parts of the interrupt functionality for external devices specified for the RISC-V ISA, namely external interrupt. Local interrupts, on the other hand, lack simulator support. However, especially in the mobile context, their functionality can be crucial, since often only a few interrupt sources are used. These interrupts need fast and efficient handling. The paper at hand extends the RISC-V implementation of gem5 by local interrupts as defined in the RISC-V specification for direct interrupt management. This extension is then used to perform a comprehensive analysis of the timing behavior of local and external interrupts. © MBMV 2024. All rights reserved.

关键词： Energy efficiency

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MAC-Filter Based Topology Control for WLAN Mesh Networks 29

MAC-Filter Based Topology Control for WLAN Mesh Networks

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29th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2024

作者： Brockmann, Tim Rethfeldt, Michael Beichler, Benjamin Golatowski, Frank Haubelt, Christian Institute of Applied Microelectronics and Computer Engineering University of Rostock Germany

ISBN: (纸本)9798350361230

WLAN Mesh Networks (WMNs) are a promising network architecture for IoT applications due to their self-healing and robust network formation capabilities. The IEEE 802.11s amendment standard integrates mesh functionality into the WLAN MAC layer, ensuring seamless peering and routing. Initially designed for testing, the Linux implementation of IEEE 802.11s includes basic peer link blocking mechanisms. Based on this, we present a new MAC address filtering approach for reliable topology control in WLAN mesh networks. Our modifications to the Linux kernel enable persistent link blocking and bidirectional link teardown, preventing the sporadic establishment of unwanted connections. Real-world experiments demonstrate the effectiveness of our approach. © 2024 IEEE.

关键词： Wireless local area networks (WLAN)

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A Novel OPC UA PubSub Protocol Binding Using MQTT for Sensor Networks (MQTT-SN) 29

A Novel OPC UA PubSub Protocol Binding Using MQTT for Sensor...

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29th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2024

作者： Nast, Michael Raddatz, Hannes Golatowski, Frank Haubelt, Christian Institute of Applied Microelectronics and Computer Engineering University of Rostock Rostock Germany

ISBN: (纸本)9798350361230

In this paper, we present the integration of MQTT for Sensor Networks (MQTT-SN) into OPC Unified Architecture (OPC UA) as a novel publish/subscribe (PubSub) protocol binding in order to enhance the industrial communication stack. By leveraging the lightweight MQTT-SN protocol, which is currently not considered in the architecture, we improve OPC UA's capability for high-frequency, low-latency messaging, which is essential for Industrial Internet of Things (IIoT) applications. We discuss related work and describe the design and implementation in detail. Our hybrid approach combines the rich data modeling and security capabilities of OPC UA with the communication efficiency of MQTT-SN, providing a scalable solution for real- time data management in industrial automation systems. © 2024 IEEE.

关键词： Network security

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On-chip integrated GeSe_(2)/Si vdW heterojunction for ultravioletenhanced broadband photodetection,imaging,and secure optical communication

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Nano Research 2024年第7期17卷 6544-6549页

作者： Zhiman Zhou Kunxuan Liu Di Wu Yunrui Jiang Ranran Zhuo Pei Lin Zhifeng Shi Yongtao Tian Wei Han Longhui Zeng Xinjian Li School of Physics and Microelectronics Key Laboratory of Material Physics Ministry of EducationZhengzhou UniversityZhengzhou 450052China Department of Electrical and Computer Engineering University of California San DiegoLa JollaCalifornia 92093USA Institute of Microelectronics and Integrated Circuits School of MicroelectronicsHubei UniversityWuhan 430062China

Broadband photodetection,spanning from ultraviolet(UV)to infrared(IR),is pivotal in diverse technological domains including astronomy,remote sensing,environmental monitoring,and medical ***,current commercially available broadband photodetectors,predominately based on conventional narrow-bandgap semiconductors,exhibit limited sensitivity in the UV *** limitation,stemming from the significant energy disparity between the semiconductor bandgap and UV photon,narrows their application ***,we report an innovative approach involving the in-situ van der Waals(vdW)integration of two-dimensional(2D)GeSe_(2)layers onto a Si *** process yields a high-quality GeSe_(2)/Si vdW heterojunction device,which features a broad response range covering from UV to near-IR(NIR)with a greatly-enhanced sensitivity in the UV *** device possesses high responsivities of 325 and 533.4 mA/W,large detectivities of 1.24×10^(13)and 2.57×10^(13)Jones,and fast response speeds of 20.6/82.1 and 17.7/81.0μs under 360 and 980 nm,***,the broadband image sensing and secure invisible optical communication capabilities of the GeSe_(2)/Si heterojunction device are *** work provides a viable approach for UV-enhanced broadband photodetection technology,opening up new possibilities and applications across various scientific and technological domains.

关键词： germanium diselenide van der Waals(vdW)integration ultraviolet enhanced broadband photodetection imaging

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Cavity-agnostic acoustofluidic manipulations enabled by guided flexural waves on a membrane acoustic waveguide actuator

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Microsystems & Nanoengineering 2024年第2期10卷 153-171页

作者： Philippe Vachon Srinivas Merugu Jaibir Sharma Amit Lal Eldwin J.Ng Yul Koh Joshua E.-Y.Lee Chengkuo Lee Department of Electrical and Computer Engineering National University of SingaporeSingaporeSingapore Institute of Microelectronics Agency for ScienceTechnology and Research(A*STAR)SingaporeSingapore SonicMEMS Laboratory School of Electrical and Computer EngineeringCornell UniversityIthacaNYUSA School of Electrical and Data Engineering University of Technology SydneyUltimoNSWAustralia

This article presents an in-depth exploration of the acoustofluidic capabilities of guided flexural waves(GFWs)generated by a membrane acoustic waveguide actuator(MAWA).By harnessing the potential of GFWs,cavity-agnostic advanced particle manipulation functions are achieved,unlocking new avenues for microfluidic systems and lab-on-a-chip *** localized acoustofluidic effects of GFWs arising from the evanescent nature of the acoustic fields they induce inside a liquid medium are numerically investigated to highlight their unique and promising *** traditional acoustofluidic technologies,the GFWs propagating on the MAWA’s membrane waveguide allow for cavity-agnostic particle manipulation,irrespective of the resonant properties of the fluidic ***,the acoustofluidic functions enabled by the device depend on the flexural mode populating the active region of the membrane *** demonstrations using two types of particles include in-sessile-droplet particle transport,mixing,and spatial separation based on particle diameter,along with streaming-induced counter-flow virtual channel generation in microfluidic PDMS *** experiments emphasize the versatility and potential applications of the MAWA as a microfluidic platform targeted at lab-on-a-chip development and showcase the MAWA’s compatibility with existing microfluidic systems.

关键词： waveguide fluid cavity

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An Online Scheduler for Reconfigurable Time-Sensitive Networks 29

An Online Scheduler for Reconfigurable Time-Sensitive Networ...

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29th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2024

作者： Kummer, Fabian Golatowski, Frank Brekenfelder, Willi Parzyjegla, Helge Danielis, Peter Mühl, Gero Institute of Applied Microelectronics and Computer Engineering University of Rostock Rostock18051 Germany Institute of Computer Science University of Rostock Rostock18051 Germany

ISBN: (纸本)9798350361230

Time-Sensitive Networking (TSN) facilitates the implementation of realtime data traffic with deterministic delay and jitter in Ethernet networks. In its time-triggered communication variant, network paths as well as transmission time slots along the paths need to be planned and reserved for all data streams, respectively. Conventionally, such a feasible (i. e., realtime compliant) network schedule is computed and optimized offline, installed upon deployment, and cannot be changed anymore at runtime without stopping the communication. The latter becomes unsuitable for future industrial use cases with a growing demand for flexibility including schedule adjustments. In this paper, we present an online scheduler capable to incrementally integrate new streams at runtime and to adapt the existing schedule, if necessary, while retaining the realtime guarantees given to active streams. For this purpose, the scheduling heuristic identifies streams whose adjustment requires minimal reconfiguration efforts. In a thorough evaluation, we analyze the scheduler's trade-off between resource usage and schedule quality showing its suitability for diverse application scenarios. © 2024 IEEE.

关键词： Delay tolerant networks

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A neuromorphic core based on threshold switching memristor with asynchronous address event representation circuits

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Science China(Information Sciences) 2022年第2期65卷 211-217页

作者： Jinsong WEI Jilin ZHANG Xumeng ZHANG Zuheng WU Rui WANG Jian LU Tuo SHI Mansun CHAN Qi LIU Hong CHEN School of Microelectronics University of Science and Technology of China Institute of Microelectronics of Chinese Academy of Sciences Zhejiang Lab Department of Microelectronics and Nanoelectronics Tsinghua University Department of Electronic & Computer Engineering The Hong Kong University of Science and Technology

The full memristive network hardware features high density and excellent scalability. However,recent researches on the full memristive network have been limited to a single-layer network, due to the lack of effective and flexible communication between neurons. In this design, we demonstrate a neuromorphic core based on Ag/Si O2/Au threshold switching memristor, which has built-in asynchronous address event representation(AER) circuits to provide flexible communication between neurons. Since temporally sparse spikes are the medium of communication between neurons, the AER circuits are designed to transmit spikes serially which have been encoded with neurons' addresses before transmission. With the asynchronous circuits design, the AER circuits will detect neurons' output in real-time. To test the performance of the neuromorphic core, we designed a behavioral simulator for the neuromporphic core to simulate the liquid state machine(LSM) network, which achieves a 100% recognition rate in the free spoken digital dataset. The simulation results show that the neuromorphic core obtains 35 times higher performance than the CPU and111 times higher energy efficiency than the GPU.

关键词： leaky-integration-and-fire (LIF) memristor threshold switching artificial neuron AER circuits asynchronous circuits on-chip communication

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TSCompiler: efficient compilation framework for dynamic-shape models

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Science China(Information Sciences) 2024年第10期67卷 67-84页

作者： Xiang LUO Chen ZHANG Chenbo GENG Yanzhi YI Jiahui HU Renwei ZHANG Zhen ZHANG Gianpietro CONSOLARO Fan YANG Tun LU Ning GU Li SHANG School of Computer Science Fudan University School of Electronic Information and Electrical Engineering Shanghai Jiao Tong University School of Computer Science and Technology Harbin Institute of Technology Huawei Technologies Co. Ltd. Huawei Paris Research Center School of Microelectronics Fudan University

Today's deep learning models face an increasing demand to handle dynamic shape tensors and computation whose shape information remains unknown at compile time and varies in a nearly infinite range at runtime. This shape dynamism brings tremendous challenges for existing compilation pipelines designed for static models which optimize tensor programs relying on exact shape values. This paper presents TSCompiler, an end-to-end compilation framework for dynamic shape models. TSCompiler first proposes a symbolic shape propagation algorithm to recover symbolic shape information at compile time to enable subsequent optimizations. TSCompiler then partitions the shape-annotated computation graph into multiple subgraphs and fine-tunes the backbone operators from the subgraph within a hardware-aligned search space to find a collection of high-performance schedules. TSCompiler can propagate the explored backbone schedule to other fusion groups within the same subgraph to generate a set of parameterized tensor programs for fused cases based on dependence analysis. At runtime, TSCompiler utilizes an occupancy-targeted cost model to select from pre-compiled tensor programs for varied tensor shapes. Extensive evaluations show that TSCompiler can achieve state-of-the-art speedups for dynamic shape models. For example, we can improve kernel efficiency by up to 3.97× on NVIDIA RTX3090, and 10.30× on NVIDIA A100 and achieve up to five orders of magnitude speedups on end-to-end latency.

关键词： machine learning tensor compilers dynamic shape operator fusion code generation auto-tuning

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