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1.1:Invited Paper:A New Design Methodology of Highly Reliable TFT Based Integrated circuits in Display Applications

SID Symposium Digest of Technical Papers 2019年第S1期50卷

作者： Di Geng Yue Su Ling Li Ming Liu Key Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing China

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Analysis of Current Research Status of Plasma Etch Process Model

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Journal of microelectronic Manufacturing 2018年第1期1卷 21-34页

作者： Xiaoting Li Rui Chen Lei Qu Xuanmin Zhu Jing Zhang Yanrong Wang Shuhua Wei Jiang Yan Yayi Wei North China University of Technology Beijing 100144China Key Laboratory of Microelectronic Devices&Integrated Technology Institute of Microelectronics of Chinese Academy of SciencesBeijing 100029China

This paper summarizes the status of the plasma etch process modeling *** mainly introduces typical etching models employing the analytical method,geometric method,system identification method,basic principle simulation method,as well as empirical *** model’s basic principles,application scopes,advantages and disadvantages are *** on these,the development history of the etch process modeling is summarized,and the development opportunities of the etch model are *** paper provides a brief view for establishment of the plasma etching process model.

关键词： plasma etching etching model simulation

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A Novel High Volume Manufacturing Method for Defect-free and High-yield SiN Micro-sieve Membranes

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Journal of microelectronic Manufacturing 2018年第1期1卷 11-20页

作者： Yansong Liu Chao Zhao Lisong Dong Rui Chen Yayi Wei Key Laboratory of Microelectronic Devices&Integrated Technology Institute of Microelectronics of Chinese Academy of SciencesBeijing 100029China University of Chinese Academy of Sciences Beijing 100049China

Micro-sieves have been widely used in medical treatment,quarantine,environment,agriculture,pharmacy and food ***,the manufacturing and yield improvement have been difficult due to multiple challenges,such as the sieve unit release defect,cracking,and KOH *** this paper,we report process details and discuss technical difficulties which are usually the root-causes for process failures,and demonstrate a reliable and high yield production of SiNx micro-sieves processed with our novel method,which is also compatible with high volume manufacturing.

关键词： micro-sieves high volume manufacturing defect free high yield

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Design of a novel ternary SRAM sense amplifier using CNFET 12

Design of a novel ternary SRAM sense amplifier using CNFET

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12th IEEE International Conference on Advanced Semiconductor Integrated circuits, ASICON 2017

作者： Liu, Zizhao Pan, Tao Jia, Song Wang, Uan Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics EECS Peking University No.5 Yiheyuan Road Haidian District Beijing100871 China

ISBN: (纸本)9781509066247

This paper presents a novel design of a ternary SRAM sense amplifier using carbon nanotube field-effect transistors (CNFETs). Chirality of CNFET is used to control the threshold voltage to realize the ternary logic. Simulation results using HSPICE shows that the proposed SRAM sense amplifier perform correctly at 0.9V supply voltage in the ternary SRAM read process. And it can achieve 87.5% and 88.5% enhancement in speed, 84.2% and 85.6% in PDP, compared with a ternary DRAM sense amplifier and the ternary SRAM without sense amplifier. © 2017 IEEE.

关键词： Carbon nanotube field effect transistors

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Structure-dependent behaviors of diode-triggered silicon controlled rectifier under electrostatic discharge stress

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Chinese Physics B 2016年第12期25卷 507-513页

作者：张立忠王源何燕冬 Key Laboratory of Microelectronic Devices and Circuits (Ministry of Education)Institute of Microelectronics Peking University

The comprehensive understanding of the structure-dependent electrostatic discharge behaviors in a conventional diode-triggered silicon controlled rectifier （DTSCR） is presented in this paper. Combined with the device simulation, a mathematical model is built to get a more in-depth insight into this phenomenon. The theoretical studies are verified by the transmission-line-pulsing （TLP） test results of the modified DTSCR structure, which is realized in a 65-nm complementary metal-oxide-semiconductor （CMOS） process. The detailed analysis of the physical mechanism is used to provide predictions as the DTSCR-based protection scheme is required. In addition, a method is also presented to achieve the tradeoff between the leakage and trigger voltage in DTSCR.

关键词： electrostatic discharge （ESD） diode-triggered silicon controlled rectifier （DTSCR） transmission-line-pulsing （TLP） mathematical modeling

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A 1.9-kV/2.61-m${\text{m}}\Omega\cdot$ cm2 Lateral GaN Schottky Barrier Diode on Silicon Substrate With Tungsten Anode and Low Turn-ON Voltage of 0.35 V

IEEE Electron Device Letters

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IEEE Electron Device Letters 2018年第10期39卷 1548-1551页

作者： Tao Zhang Jincheng Zhang Hong Zhou Tangsheng Chen Kai Zhang Zhuangzhuang Hu Zhaoke Bian Kui Dang Yi Wang Li Zhang Jing Ning Peijun Ma Yue Hao Key Laboratory of Wide Band Gap Semiconductor Materials and Devices School of Microelectronics Xidian University Xi’an China Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing Electronic Devices Institute Nanjing China

In this letter, we report the achievement of a high-performance lateral GaN Schottky barrier diode (SBD) on a silicon substrate with a low turn-ON voltage (V ON ) of 0.35 V and tungsten (W) as the anode. Non-field-plated lateral GaN SBDs with the anode-cathode distances (L AC ) of 6, 10, 15, 20, and 25 μm demonstrate the reverse breakdown voltages of 0.6, 1.1, 1.25, 1.5, and 1.9 kV with the differential specific ON-resistances (R ON , sp ) of 0.38, 0.72, 1.23, 1.87, and 2.61 mΩ·cm 2 , respectively. The power figure-of-merit (FOM) is calculated to be 1×10 3 , 1.7×10 3 , 1.3×10 3 , 1.2×10 3 , and 1.4×10 3 MW/cm 2 . To the best of our knowledge, this FOM of 1.7×10 3 MW/cm 2 is the highest among all the lateral GaN SBDs on a Si substrate. Combined with the ~10 8 current ON/OFF ratio at room temperature, the GaN SBD with the W anode shows a great promise for next-generation power electronics.

关键词： Gallium nitride Anodes Current density Silicon Wide band gap semiconductors Aluminum gallium nitride Schottky barriers

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How to Report and Benchmark Emerging Field-Effect Transistors

arXiv

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arXiv 2022年

作者： Cheng, Zhihui Pang, Chin-Sheng Wang, Peiqi Le, Son T. Wu, Yanqing Shahrjerdi, Davood Radu, Iuliana Lemme, Max C. Peng, Lian-Mao Duan, Xiangfeng Chen, Zhihong Appenzeller, Joerg Koester, Steven J. Pop, Eric Franklin, Aaron D. Richter, Curt A. Nanoscale Device Characterization Division National Institute of Standards and Technology GaithersburgMD20899 United States Department of Electrical and Computer Engineering Purdue University West LafayetteIN47907 United States Department of Chemistry and Biochemistry University of California Los Angeles Los AngelesCA90095 United States Theiss Research La Jolla CA92037 United States School of Integrated Circuits Peking University Beijing100871 China Electrical and Computer Engineering New York University BrooklynNY11201 United States Center for Quantum Phenomena Physics Department New York University New YorkNY10003 United States IMEC Leuven Belgium RWTH Aachen University Electronic Devices Otto-Blumenthal-Str. 2 Aachen52074 Germany AMO GmbH Advanced Microelectronic Center Aachen Otto-Blumenthal-Str. 25 Aachen52074 Germany Key Laboratory for the Physics and Chemistry of Nanodevices Center for Carbon-Based Electronics Department of Electronics Peking University Beijing China Department of Electrical and Computer Engineering University of Minnesota MinneapolisMN55455 United States Department of Electrical Engineering Stanford University StanfordCA94305 United States Department of Electrical and Computer Engineering Duke University DurhamNC27708 United States Department of Chemistry Duke University DurhamNC27708 United States

The use of organic, oxide and low-dimensional materials in field-effect transistors has now been studied for decades. However, properly reporting and comparing device performance remains challenging due to the interdependency of multiple device parameters. The interdisciplinarity of this research community has also led to a lack of consistent reporting and benchmarking guidelines. Here we propose guidelines for reporting and benchmarking key field-effect transistor parameters and performance metrics. We provide an example of this reporting and benchmarking process by using a two-dimensional semiconductor field-effect transistor. Our guidelines should help promote an improved approach for assessing device performance in emerging field-effect transistors, helping the field to progress in a more consistent and meaningful way. © 2022, CC BY.

关键词： Benchmarking

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Resist model setup for negative tone development at 14NM node

Resist model setup for negative tone development at 14NM nod...

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China Semiconductor Technology International Conference (CSTIC)

作者： Lijun Zhao Lisong Dong Libin Zhang Yayi Wei Tianchun Ye University of Chinese Academy of Sciences Beijing China Key Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics of Chinese Academy of Sciences Beijing China

The shrinkage effect of negative tone development (NTD) process is the primary cause of the mismatch between simulation data and experimental data. Therefore, the resist model is strongly required in the lithography simulation for NTD process. A practical flow of building a resist model is presented for 14nm NTD process, including test patterns design, model calibration and model verification. The test patterns are designed according to the optical parameters and resist parameters. Then, we use experimental data to calibrate and verify the model. The results show the simulation data have the same trend with experimental data, which indicates that the resist model has the capacity of capturing the resist shrinkage effect of NTD process.

关键词： Resists Calibration Semiconductor device modeling Data models Optical imaging Lithography Optical reflection

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基于纳米离子栅控的新型神经形态器件研究

基于纳米离子栅控的新型神经形态器件研究

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中国真空学会2018学术年会

作者： Yuchao Yang Key Laboratory of Microelectronic Devices and Circuits(MOE) Institute of MicroelectronicsPeking UniversityBeijing 100871China

Nanoionics based devices and networks are intriguing candidates for the construction of new computing systems that could perform intelligent and energy-efficient *** this talk,I will discuss recent progresses in the development of neuromorphic devices and networks,as well as a few critical challenges existing in the mechanism,device and network levels that must be overcome[1-2].

关键词： Neuromorphic computing synaptic plasticity ionic gating diffusive dynamics

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Design of a Novel Ternary SRAM Sense Amplifier Using CNFET

Design of a Novel Ternary SRAM Sense Amplifier Using CNFET

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2017 IEEE 12th International Conference on ASIC

作者： Zizhao Liu Tao Pan Song Jia Yuan Wang Key Laboratory of Microelectronic Devices and Circuits Institute of MicroelectronicsEECSPeking University

This paper presents a novel design of a ternary SRAM sense amplifier using carbon nanotube field-effect transistors(CNFETs).Chirality of CNFET is used to control the threshold voltage to realize the ternary *** results using HSPICE shows that the proposed SRAM sense amplifier perform correctly at 0.9 V supply voltage in the ternary SRAM read *** it can achieve 87.5% and 88.5% enhancement in speed,84.2% and 85.6% in PDP,compared with a ternary DRAM sense amplifier and the ternary SRAM without sense amplifier.

关键词： ternary CNFET sense amplifier

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