Black silicon was prepared with polycrystalline silicon by plasma immersion ion implantation. The microstructure, optical absorbance and lifetime of minority carriers of the black silicon were characterized by scannin...
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Black silicon was prepared with polycrystalline silicon by plasma immersion ion implantation. The microstructure, optical absorbance and lifetime of minority carriers of the black silicon were characterized by scanning electron microscopy (SEM), UV-VIS-NIR spectrophotometer and microwave photoconductive decay (μ-PCD), respectively. The results show that the black silicon has a porous structure. The average absorbance of the black silicon is above 94% in the visible region. The average lifetime of minority carriers in the black silicon is 5.68μs. The effect of immersion parameters on the black silicon was investigated. It is found that the gas flux ratio of SF6 to O2 plays an important role in the microstructure and properties, and its optimum value is 2.80.
RapidIO is an open standard that provides high-performance interconnect for chip-to-chip, board-to-board, and chassis-to-chassis communications. In this paper, we present an executable RapidIO interconnect in which an...
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ISBN:
(纸本)9781424467372
RapidIO is an open standard that provides high-performance interconnect for chip-to-chip, board-to-board, and chassis-to-chassis communications. In this paper, we present an executable RapidIO interconnect in which an improved Buffer structure based on flow control is put forward. It helps to provide a smooth data flow, strong built-in error detection and error recovery mechanisms. It is tested to increase utilization and lower packet latency. And it can be applied to reliable and high speed embedded system communications.
A CMOS front-end integrated circuit consisting of 16 identical analog channels is proposed for semiconductor radiation detectors. Each of the 16 channels has a low noise charge sensitive amplifier, a pulse shaper, a p...
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A CMOS front-end integrated circuit consisting of 16 identical analog channels is proposed for semiconductor radiation detectors. Each of the 16 channels has a low noise charge sensitive amplifier, a pulse shaper, a peak detect and hold circuit and a discriminator, while analog voltage and channel address are routed off the chip. It can accommodate both electron and hole collection with selectable gain and peaking time. Sequential and sparse readout, combining with self-trigger and external trigger, makes four readout modes. The circuit is implemented in a 0.35 μm DP4M (double-poly-quad-metal) CMOS technology with an area of 2.5×1.54 mm2 and power dissipation of 60 mW. A single channel chip is tested with Verigy 93000. The gain is adjustable from 13 to 130 mV·fC–1 while the peaking time varies between 0.7 and 1.6 μs. The linearity is more than 99% and the equivalent noise charge is about 600e.
An InP/InGaAs single heterojunction bipolar transistor（SHBT） with high maximum oscillation frequency （fmax） and high cutoff frequency（ft） is *** have been made to maximize f（max） and ft simultaneously includin...
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An InP/InGaAs single heterojunction bipolar transistor（SHBT） with high maximum oscillation frequency （fmax） and high cutoff frequency（ft） is *** have been made to maximize f（max） and ft simultaneously including optimizing the epitaxial structure,base-collector mesa over-etching and base surface *** measured ft and fmax both reached 185 GHz with an emitter size of 1×20μm^2,which is the highest f_（max） for SHBTs in China's *** device is suitable for ultra-high speed digital circuits and low power analog applications.
To meet the accuracy requirement for the bandgap voltage reference by the increasing data conversion precision of integrated circuits,a high-order curvature-compensated bandgap voltage reference is presented employing...
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To meet the accuracy requirement for the bandgap voltage reference by the increasing data conversion precision of integrated circuits,a high-order curvature-compensated bandgap voltage reference is presented employing the characteristic of bipolar transistor current gain exponentially changing with temperature *** addition,an over-temperature protection circuit with a thermal hysteresis function to prevent thermal oscillation is *** on the CSMC 0.5μm 20 V BCD process,the designed circuit is implemented;the active die area is 0.17×0.20 mm;. Simulation and testing results show that the temperature coefficient is 13.7 ppm/K with temperature ranging from -40 to 150℃,the power supply rejection ratio is -98.2 dB,the line regulation is 0.3 mV/V,and the power consumption is only 0.38 *** proposed bandgap voltage reference has good characteristics such as small area,low power consumption, good temperature stability,high power supply rejection ratio,as well as low line *** circuit can effectively prevent thermal oscillation and is suitable for on-chip voltage reference in high precision analog,digital and mixed systems.
Based on the SinoMOS 1 μm 40 V CMOS process, a novel power factor corrention （PFC） converter with a low-power variable frequency function is presented. The circuit introduces a multi-vector error amplifier and a pr...
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Based on the SinoMOS 1 μm 40 V CMOS process, a novel power factor corrention （PFC） converter with a low-power variable frequency function is presented. The circuit introduces a multi-vector error amplifier and a programmable oscillator to achieve frequency modulation, which provides a rapid dynamic response and precise output voltage clamping with low power in the entire load. According to the external load variation, the system can modulate the circuit operating frequency linearly, thereby ensuring that the PFC converter can work in frequency conversionmode. Measured results show that the normal operating frequency of the PFC converter is 5-6 kHz, the start-up current is 36 μA, the stable operating current is only 2.43 mA, the efficiency is 97.3%, the power factor （PF） is 0.988, THD is 3.8%, the load adjust rate is 3%, and the linear adjust rate is less than 1%. Both theoretical and practical results reveal that the power consumption of the whole supply system is reduced efficiently, especially when the load varies. The active die area of the PFC converter chip is 1.61 ×1.52 mm^2.
Fast statistical methods of interconnect delay and slew in the presence of process fluctuations are proposed. Using an optimized quadratic model to describe the effects of process variations, the proposed method enabl...
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Fast statistical methods of interconnect delay and slew in the presence of process fluctuations are proposed. Using an optimized quadratic model to describe the effects of process variations, the proposed method enables closedform expressions of interconnect delay and slew for the given variations in relevant process parameters. Simulation results show that the method, which has a statistical characteristic similar to traditional methodology, is more efficient compared to HSPICE-based Monte Carlo simulations and traditional methodology.
In this paper, a novel design method has been proposed to realize feed-forward low-distortion unity STF sigma-delta modulators which are the critical blocks in multi-loop SMASH structure. Using the method, a timing-re...
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In this paper, two high-resolution mediumbandwidth single-loop 4 th-order single-bit sigma-delta modulators using a feed-forward and a feedback topology respectively are implemented in 0.13μm CMOS technology. The ove...
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In this paper, several techniques which relax circuit requirements of building blocks are presented to effectively realize wideband high-resolution cascade sigma-delta modulator. Three cascade structures have been pro...
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ISBN:
(纸本)9781424467372
In this paper, several techniques which relax circuit requirements of building blocks are presented to effectively realize wideband high-resolution cascade sigma-delta modulator. Three cascade structures have been proposed in this paper. First, a MASH 2-2 with feed-forward topology in both stages has been explained to obtain low-distortion property and remove subtraction. Second, a flexible SMASH 2-2 has been proposed to choose appropriate coefficients for different requirements. Third, a SMASH 2-2 with feed-forward quantization noise self-coupled structure has been displayed to cancel quantization error of the preceding stage totally. Detailed simulation results and comparisons demonstrate the performance of these topologies.
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