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3rd International Conference on Biological Information and Biomedical Engineering, BIBE 2019

作者： Yang, Zheng Wang, Jingmin Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China College of Career Technology Hebei Normal University Shijiazhuang China

ISBN: (纸本)9783800750269

An ECG readout front-end for long-term sleep monitoring is presented in this paper and features high common-mode rejection ratio (CMRR) and low input referred noise. The proposed front-end circuit composed of an AC coupled chopping instrumentation amplifier (CCIA), a SC-filter and a 10 bit SAR ADC. The proposed circuit, built in standard 0.18μm CMOS technology, consumes 1.6 μW from 0.5 V. According to the simulation, the AC coupled IA's CMRR is over 90 dB and input referred noise is merely l.28 μVrms. With the input impedance boost loop, a constant 2.4GO input impedance is achieved (@ typical condition). With the chip, for ECG sensor data, a QRS detection algorithm for heart beat rate calculation is implemented to demonstrate smartphone computation feasibility for real-time signal processing. © VDE VERLAG GMBH · Berlin · Offenbach.

关键词： Electrocardiograms

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Impact of Nanopillar-Type Electrode on HFOx -Based RRAM Performance

Impact of Nanopillar-Type Electrode on HFOx -Based RRAM Perf...

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China Semiconductor Technology International Conference (CSTIC)

作者： Baotong Zhang Xiaokang Li Yuancheng Yang Haixia Li Ru Huang Ming Li Peimin Lu Key Laboratory of Microelectronic Devices and Circuits Institute of Microelectronics Peking University Beijing China College of Physics and Information Engineering Fuzhou University Fuzhou China

ISBN: (数字)9781728165585

ISBN: (纸本)9781728165592

In this work, the performance of HfOx-based RRAM with 30nm nanopillar-type electrode was investigated. Experiment results show that the novel device has lower operation voltages and higher resistance ratio than conventional flat electrode RRAM. The underlying physical mechanism is attributed to the enhanced electric field by the nanopillar electrode. This research will provide a valuable guidance for future scaling of oxide-based RRAM.

关键词： Electrodes Performance evaluation Resistance Electric potential Switches Hafnium compounds Electric fields

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An Energy-Efficient Mixed-Signal Parallel Multiply-Accumulate (MAC) Engine Based on Stochastic Computing

An Energy-Efficient Mixed-Signal Parallel Multiply-Accumulat...

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International Conference on ASIC

作者： Xinyue Zhang Jiahao Song Yuan Wang Yawen Zhang Zuodong Zhang Runsheng Wang Ru Huang Institute of Microelectronics and Key Laboratory of Microelectronics Devices and Circuits (MoE) Peking University Beijing P.R. China

Convolutional neural networks (CNN) have achieved excellent performance on various tasks, but deploying CNN to edge is constrained by the high energy consumption of convolution operation. Stochastic computing (SC) is an attractive paradigm which performs arithmetic operations with simple logic gates and low hardware cost. This paper presents an energy-efficient mixed-signal multiply-accumulate (MAC) engine based on SC. A parallel architecture is adopted in this work to solve the latency problem of SC. The simulation results show that the overall energy consumption of our design is 5.03pJ per 26-input MAC operation under 28nm CMOS technology.

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An Energy-Efficient Computing-in-Memory Neuromorphic System with On-Chip Training

An Energy-Efficient Computing-in-Memory Neuromorphic System ...

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IEEE Biomedical circuits and Systems (BIOCAS)

作者： Zhao Zhao Yuan Wang Xinyue Zhang Xiaoxin Cui Ru Huang Institute of Microelectronics and Key Laboratory of Microelectronics Devices and Circuits (MoE) Peking University Beijing P.R. China

The aim of neuromorphic computing system is to implement the computational power and efficiency of the human brain. Computing-in-memory (CIM) is a promising and energy-efficient way to perform intensive computations, whose structure is similar to human brain synapse. A 8.78TOPS/W biologically-inspired neuromorphic computing system for pattern recognition based on CIM architecture is presented in this work. The proposed system supports on-chip training with energy-efficient bio-plausible spike-timing-dependent plasticity (STDP) rule and performs multiply-and-accumulate (MAC) computations inside SRAM array during inference, which greatly reduces the energy consumption. Simulated in 65-nm technology, the proposed system achieves good performance and energy efficiency for pattern recognition. The total energy consumption of training and classifying per image of the proposed system is 0.20 nJ. And the proposed spiking neural network (SNN) just consumes 0.074mW at 1.0V with the throughput of 2.5M images/s in inference phase.

关键词： Neurons Training Synapses Random access memory Testing Neuromorphics Static VAr compensators

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Improved Discrete Wavelet Analysis and Principal Component Analysis for EEG Signal Processing

Improved Discrete Wavelet Analysis and Principal Component A...

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International Conference on ASIC

作者： YiHsiang Chen Xiaoxin Cui Kanglin Xiao Dunshan Yu Key Laboratory of Microelectronics Devices and Circuits (MoE) Institute of Microelectronics Peking University Beijing P. R. China

Electroencephalogram (EEG) has significant applications on medical diagnosis and Brain Computer Interface (BCI). But the main obstacle of analyzing EEG signal is various types of noises to get actual information. Extracting important features is a key issue in this study. This paper uses the BCI Competition IV 2b motion imagery data, in which we provide a review of various prior art to determine the motion imaginary MI mission. Using machine learning to identify two different movements in the EEG signal, the data from nine subjects were analyzed by principal component analysis (PCA) combined with discrete wavelet (DWT) packet analysis. The extracted DWT feature is input into the support vector machine (SVM) classifier, and the experimental results shows that this method is better than traditional methods with a classification accuracy rate of 86.7%.

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First-principles Simulations of Tunneling FETs Based on van der Waals MoTe2/SnS2 Heterojunctions with Gate-to-drain Overlap Design

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Journal of Microelectronic Manufacturing 2020年第4期3卷 32-39页

作者： Kun Luo Kui Gong Jiangchai Chen Shengli Zhang Yongliang Li Huaxiang Yin Zhenhua Wu Key Laboratory of Microelectronics Device and Integrated Technology Institute of Microelectronics of Chinese Academy of SciencesBeijing 100029China IMECAS-MU-HZW joint computing laboratory of Integrated Circuits Beijing 100029China MIIT Key Laboratory of Advanced Display Materials and Devices School of Materials Science and EngineeringNanjing University of Science and TechnologyNanjing 210094China.

The electronic properties and transport properties of MoTe2/SnS2 heterostructure Tunneling FETs are investigated by the density functional theory coupled with non-equilibrium Green’s function *** dimensional(2D)monolayer MoTe2 and SnS2 are combined to a vertical van der Waals heterojunction.A small staggered band gap is formed in the overlap region,while larger gaps remain in the underlap source and drain regions of monolayer MoTe2 and SnS2 *** a type-II heterojunction is favorable for tunneling ***,we suggest short stack length and large gate-to-drain overlap to enhance the on-state current suppress the leakage current *** numerical results show that at a low drain to source voltage Vds=0.05V,On/Off current ratio can reach 108 and the On-state currents is over 20μA/μm for ntype *** results present that van der Waals heterostructure TFETs can be potential candidate as next generation ultra-steep subthreshold and low-power electronic applications.

关键词： 2D materials heterojunction tunnel-FET gate-to-drain overlap DFT-NEGF.

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Self-Adaptive Radiative Cooler for Maximizing Year-Round Energy Saving of households

Self-Adaptive Radiative Cooler for Maximizing Year-Round Ene...

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Conference on Lasers and Electro-Optics (CLEO)

作者： Jiachen Li Kechao Tang Kaichen Dong Madeleine P. Gordon Finnegan G. Reichertz Hyungjin Kim Yoonsoo Rho Qingjun Wang Chang-Yu Lin Costas P. Grigoropoulos Ali Javey Jeffrey J. Urban Jie Yao Ronnen Levinson Junqiao Wu Division of Materials Sciences Lawrence Berkeley National Laboratory Berkeley CA USA Applied Science and Technology Graduate Group University of California Berkeley CA USA Department of Materials Science and Engineering University of California Berkeley CA USA Key Laboratory of Microelectronic Devices and Circuits (MOE) School of Integrated Circuits Peking University Beijing P. R. China The Molecular Foundry Lawrence Berkeley National Laboratory Berkeley CA USA East Bay Innovation Academy Oakland CA USA Department of Electrical Engineering and Computer Sciences University of California Berkeley CA USA Department of Mechanical Engineering University of California Berkeley CA USA Lawrence Berkeley National Laboratory Heat Island Group Berkeley CA USA

We present an approach to household thermal regulation and energy saving from an all-season perspective by developing a mechanically flexible and energy-free coating that automatically adapts its thermal emittance to ... 详细信息

ISBN: (数字)9781957171050

ISBN: (纸本)9781665466660

关键词： Space vehicles Energy consumption Electric potential Regulation Coatings Laser transitions Laser beam cutting

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A 1.3-µW −0.3/+0.27°C Inaccuracy Fully-integrated Temperature Sensor Based on a Pre-Charge Relaxation Oscillator for IoT applications

A 1.3-µW −0.3/+0.27°C Inaccuracy Fully-integrated Tempera...

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Asia-Pacific Conference on Microwave

作者： Yi Tan Zexue Liu Xiucheng Hao Zhengkun Shen Haoyun Jiang Fan Tian Junhua Liu Laboratory of Microelectronic Devices and Circuits (MOE) Institute of Microelectronics Peking University Beijing China

ISBN: (数字)9781728135175

ISBN: (纸本)9781728135182

This paper presents a CMOS fully-integrated temperature sensor based on a relaxation oscillator for IoT applications. To reduce power consumption, this sensor utilizes the half-period pre-charge compensation relaxation oscillator and uses a time-to-digital convertor (TDC) instead of analog-to-digital convertor (ADC) to count. Besides, the current distribution circuit is employed to improve temperature accuracy. The proposed sensor is implemented in 0.18 μm CMOS and occupies an area of 0.11 mm 2 . Measurement results show that the temperature sensor achieves an inaccuracy of -0.3/+0.27 °C across -15°C to 65°C after 2-point calibration. The chip consumes 1.3 μW at 27°C with a 650 mV voltage supply.

关键词： Temperature sensors Temperature measurement Oscillators Internet of Things Integrated circuits Calibration Radiofrequency identification

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A Design of Four Dies Parallel NAND Flash Memory Controller Supporting Toggle and ONFI mode

A Design of Four Dies Parallel NAND Flash Memory Controller ...

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International Conference on Solid-State and Integrated Circuit Technology

作者： Qin Huang Zilin Wang Wengao Lu School of Software and Microelectronics Peking University Beijing P.R. China Key Laboratory of Microelectronic Devices and Circuits Peking University Beijing P.R. China

ISBN: (数字)9781728162355

ISBN: (纸本)9781728162362

The data access speed is an important index of the NAND Flash memory. This paper proposes a new structure which can implement high-speed data storage. One important feature of the controller is that one controller can operate four dies of NAND Flash memory at the same time. It improves the speed of data access effectively. The other important feature is that the controller can support both of the Toggle mode and ONFI mode. DDR protocol can achieve high rapid speed of storage. This design is attached to SOC system as AHB slave. The verification results demonstrate that this designed controller can correctly control NAND Flash memory to read, page program, reset, read ID, read status and block erase. The experimental results based on FPGA demonstrate that the speed of page program is 105.2MB/s. The read/write speed of the four dies parallel controller is 4 times better than the traditional controller.

关键词： Flash memories Registers Field programmable gate arrays Error correction codes Integrated circuit modeling Clocks Parity check codes

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A Novel Conversion Method for Spiking Neural Network using Median Quantization

A Novel Conversion Method for Spiking Neural Network using M...

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IEEE International Symposium on circuits and Systems (ISCAS)

作者： Chenglong Zou Xiaoxin Cui Jiexian Ge Hanghang Ma Xinan Wang Key Laboratory of Microelectronics Devices and Circuits Institute of Microelectronics Peking University Beijing 100871 China Key Laboratory of Integrated Microsystem School of ECE Peking University Shenzhen Graduate School Shenzhen 518055 China Key Laboratory of Integrated Microsystem School of ECE Peking University Shenzhen Graduate School Shenzhen 518055 China

ISBN: (数字)9781728133201

ISBN: (纸本)9781728133218

Artificial Neural Networks (ANNs) have achieved great success in the field of computer vision and language understanding. However, it is difficult to deploy these deep learning models on mobile devices because of its massive energy consumption and memory occupation. For another way, highly inspired from biological brain, spiking neural networks (SNNs), are often referred to as the 3-th generation of neural network for its potential superiority in cognitive learning and energy efficiency. Nevertheless, training a deep SNN remains a big challenge. In this paper, we propose a quantized training algorithm for ANNs to minimize spike approximation error, and provide two (temporally or spatially) rate-based conversion methods for SNNs, both of which can be easily mapped to specific neuromorphic platforms. Besides, this novel method can be generalized to various network architectures and adapted to dynamic quantization demand. Experimental results on MNIST and CIFAR-10 dataset demonstrate that the proposed deep spiking neural networks yield the state-of-the-art classification accuracy and need much less operations compared with their ANN counterparts. Our source code will be available upon request for the academic purpose.

关键词： Quantization (signal) Neurons Biological neural networks Encoding Training Upper bound Artificial neural networks

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