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Minimal Context-Switching Data Race Detection with Dataflow Tracking

Journal of Computer Science & technology 2024年第1期39卷 211-226页

作者：郑龙李洋辛杰刘海峰郑然廖小飞金海 National Engineering Research Center for Big Data Technology and System School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China Services Computing Technology and System Laboratory School of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China Cluster and Grid Computing Laboratory School of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China

Data race is one of the most important concurrent anomalies in multi-threaded *** con-straint-based techniques are leveraged into race detection,which is able to find all the races that can be found by any oth-er sound race ***,this constraint-based approach has serious limitations on helping programmers analyze and understand data ***,it may report a large number of false positives due to the unrecognized dataflow propa-gation of the ***,it recommends a wide range of thread context switches to schedule the reported race(in-cluding the false one)whenever this race is exposed during the constraint-solving *** ad hoc recommendation imposes too many context switches,which complicates the data race *** address these two limitations in the state-of-the-art constraint-based race detection,this paper proposes DFTracker,an improved constraint-based race detec-tor to recommend each data race with minimal thread context ***,we reduce the false positives by ana-lyzing and tracking the dataflow in the *** this means,DFTracker thus reduces the unnecessary analysis of false race *** further propose a novel algorithm to recommend an effective race schedule with minimal thread con-text switches for each data *** experimental results on the real applications demonstrate that 1)without removing any true data race,DFTracker effectively prunes false positives by 68%in comparison with the state-of-the-art constraint-based race detector;2)DFTracker recommends as low as 2.6-8.3(4.7 on average)thread context switches per data race in the real world,which is 81.6%fewer context switches per data race than the state-of-the-art constraint based race ***,DFTracker can be used as an effective tool to understand the data race for programmers.

关键词： data race satisfiability modulo theory multi-threaded program dynamic detection

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Towards High-Performance Graph Processing: From a Hardware/Software Co-Design Perspective

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Journal of Computer Science & technology 2024年第2期39卷 245-266页

作者：廖小飞赵文举金海姚鹏程黄禹王庆刚赵进郑龙张宇邵志远 National Engineering Research Center for Big Data Technology and System School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China Services Computing Technology and System Laboratory School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China Cluster and Grid Computing Laboratory School of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China Zhejiang Lab Hangzhou 311121China

Graph processing has been widely used in many scenarios,from scientific computing to artificial *** processing exhibits irregular computational parallelism and random memory accesses,unlike traditional ***,running graph processing workloads on conventional architectures(e.g.,CPUs and GPUs)often shows a significantly low compute-memory ratio with few performance benefits,which can be,in many cases,even slower than a specialized single-thread graph *** domain-specific hardware designs are essential for graph processing,it is still challenging to transform the hardware capability to performance boost without coupled software *** article presents a graph processing ecosystem from hardware to *** start by introducing a series of hardware accelerators as the foundation of this ***,the codesigned parallel graph systems and their distributed techniques are presented to support graph ***,we introduce our efforts on novel graph applications and hardware *** results show that various graph applications can be efficiently accelerated in this graph processing ecosystem.

关键词： graph processing hardware accelerator software system high performance ecosystem

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Evaluating RISC-V Vector Instruction Set Architecture Extension with Computer Vision Workloads

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Journal of Computer Science & technology 2023年第4期38卷 807-820页

作者：李若时彭平邵志远金海郑然 National Engineering Research Center for Big Data Technology and System Huazhong University of Science and Technology Wuhan 430074China Services Computing Technology and System Laboratory Huazhong University of Science and TechnologyWuhan 430074 China Cluster and Grid Computing Lab Huazhong University of Science and TechnologyWuhan 430074China

Computer vision(CV)algorithms have been extensively used for a myriad of applications *** the multimedia data are generally well-formatted and regular,it is beneficial to leverage the massive parallel processing power of the underlying platform to improve the performances of CV *** Instruction Multiple Data(SIMD)instructions,capable of conducting the same operation on multiple data items in a single instruction,are extensively employed to improve the efficiency of CV *** this paper,we evaluate the power and effectiveness of RISC-V vector extension(RV-V)on typical CV algorithms,such as Gray Scale,Mean Filter,and Edge *** our examinations,we show that compared with the baseline OpenCV implementation using scalar instructions,the equivalent implementations using the RV-V(version 0.8)can reduce the instruction count of the same CV algorithm up to 24x,when processing the same input ***,the actual performances improvement measured by the cycle counts is highly related with the specific implementation of the underlying RV-V *** our evaluation,by using the vector co-processor(with eight execution lanes)of Xuantie C906,vector-version CV algorithms averagely exhibit up to 2.98x performances speedups compared with their scalar counterparts.

关键词： RISC-V vector extension single instruction multiple data(SIMD) computer vision OpenCV

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Massively parallel algorithms for fully dynamic all-pairs shortest paths

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Frontiers of Computer Science 2024年第4期18卷 201-203页

作者： Chilei WANG Qiang-Sheng HUA Hai JIN Chaodong ZHENG National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China State Key Laboratory for Novel Software Technology Nanjing UniversityNanjing 210023China

1 Introduction In recent years,the Massively Parallel Computation(MPC)model has gained significant ***,most of distributed and parallel graph algorithms in the MPC model are designed for static graphs[1].In fact,the graphs in the real world are constantly *** size of the real-time changes in these graphs is smaller and more *** graph algorithms[2,3]can deal with graph changes more efficiently[4]than the corresponding static graph ***,most studies on dynamic graph algorithms are limited to the single machine ***,a few parallel dynamic graph algorithms(such as the graph connectivity)in the MPC model[5]have been proposed and shown superiority over their parallel static counterparts.

关键词： dynamic shortest gained

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P3DC:Reducing DRAM Cache Hit Latency by Hybrid Mappings

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Journal of Computer Science & technology 2024年第6期39卷 1341-1360页

作者： Ye Chi Ren-Tong Guo Xiao-Fei Liao Hai-Kun Liu Jianhui Yue National Engineering Research Center for Big Data Technology and System Wuhan 430074China Services Computing Technology and System Laboratory Wuhan 430074China Cluster and Grid Computing Laboratory Wuhan 430074China School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China School of Big Data and Internet Shenzhen Technology UniversityShenzhen 518118China Department of Computer Science Michigan Technological UniversityHoughton 49931-1295U.S.A.

Die-stacked dynamic random access memory(DRAM)caches are increasingly advocated to bridge the performance gap between the on-chip cache and the main *** fully realize their potential,it is essential to improve DRAM cache hit rate and lower its cache hit *** order to take advantage of the high hit-rate of set-association and the low hit latency of direct-mapping at the same time,we propose a partial direct-mapped die-stacked DRAM cache called *** design is motivated by a key observation,i.e.,applying a unified mapping policy to different types of blocks cannot achieve a high cache hit rate and low hit latency *** address this problem,P3DC classifies data blocks into leading blocks and following blocks,and places them at static positions and dynamic positions,respectively,in a unified set-associative *** also propose a replacement policy to balance the miss penalty and the temporal locality of different *** addition,P3DC provides a policy to mitigate cache thrashing due to block type *** results demonstrate that P3DC can reduce the cache hit latency by 20.5%while achieving a similar cache hit rate compared with typical set-associative caches.P3DC improves the instructions per cycle(IPC)by up to 66%(12%on average)compared with the state-of-the-art direct-mapped cache—BEAR,and by up to 19%(6%on average)compared with the tag-data decoupled set-associative cache—DEC-A8.

关键词： die-stacked dynamic random access memory(DRAM) cache set-associative direct-mapped hit latency

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Towards Stricter Black-box Integrity Verification of Deep Neural Network Models 24

Towards Stricter Black-box Integrity Verification of Deep Ne...

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32nd ACM International Conference on Multimedia, MM 2024

作者： He, Chaoxiang Bai, Xiaofan Ma, Xiaojing Zhu, Bin B. Hu, Pingyi Fu, Jiayun Jin, Hai Zhang, Dongmei Huazhong University of Science and Technology Hubei Wuhan China Shanghai Jiao Tong University Shanghai China Microsoft Corporation Beijing China National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Hubei Engineering Research Center on Big Data Security Hubei Key Laboratory of Distributed System Security School of Cyber Science and Engineering Huazhong University of Science and Technology China National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology China

ISBN: (纸本)9798400706868

Cloud-based machine learning services offer significant advantages but also introduce the risk of tampering with cloud-deployed deep neural network (DNN) models. Black-box integrity verification (BIV) allows model owners and end-users to determine if a cloud-deployed DNN model has been tampered with by examining only the top-1 label responses. Fingerprinting generates fingerprint samples to query the model, achieving BIV with no impact on the model's accuracy. In this paper, we present BIVBench, the first comprehensive benchmark for BIV of DNN models. BIVBench covers 16 types of model modifications, providing extensive coverage of practical modification scenarios. Our analysis reveals that existing fingerprinting methods, which are typically focused on significant tampering, lack the sensitivity needed to effectively detect subtle yet common and potentially severe modifications. To address this limitation, we propose MiSentry (Model Integrity Sentry), a novel fingerprinting method that leverages meta-learning. MiSentry strategically incorporates a few subtly modified models into the meta-learning model zoo and maximizes the divergence of output predictions between the target model and the modified models in the model zoo to generate highly sensitive, generalizable, and effective fingerprint samples. Extensive evaluations using BIVBench demonstrate that MiSentry outperforms existing state-of-the-art methods overall and significantly surpasses them in detecting subtle modifications. The BIVBench and supplementary materials are available at: https://***/CGCL-codes/BIVBench. © 2024 ACM.

关键词： Deep neural networks

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Impulsive Control of Nonlinear Multi-Agent systems: A Hybrid Fuzzy Adaptive and Event-Triggered Strategy

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IEEE Transactions on Fuzzy systems 2025年第6期33卷 1889-1898页

作者： Han, Fang Jin, Hai Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Laboratory Cluster and Grid Computing Laboratory School of Computer Science and Technology Wuhan430074 China

This paper presents a hybrid control approach that integrates an adaptive fuzzy mechanism with an event-triggered impulse strategy to address consensus control challenges in nonlinear Multi-Agent systems (MASs) with uncertain information, both in leader and leaderless scenarios. Firstly, a fuzzy logic-based adaptive control mechanism is proposed to handle system nonlinearity and uncertainty. This mechanism dynamically adjusts fuzzy control rules in real time, enabling the system to adapt to changing conditions and enhancing its robustness against nonlinear disturbances. Secondly, to alleviate communication overhead and reduce control frequency, an event-triggered impulse strategy is implemented. This strategy activates impulse control only under specific conditions, effectively minimizing control actions while maintaining system consensus. Using Lyapunov stability theory, sufficient conditions for achieving system consensus are established, demonstrating the global consensus and robustness of the MASs under certain criteria. Finally, numerical simulations and experimental evaluations validate the proposed method's effectiveness and its practical advantages. © 2025 IEEE.

关键词： Multi agent systems

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On the Security of Smart Home systems:A Survey

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Journal of Computer Science & technology 2023年第2期38卷 228-247页

作者：袁斌万俊吴宇晗邹德清金海 School of Cyber Science and Engineering Huazhong University of Science and TechnologyWuhan 430074China Hubei Key Laboratory of Distributed System Security Huazhong University of Science and Technology Wuhan 430074China Hubei Engineering Research Center on Big Data Security Huazhong University of Science and Technology Wuhan 430074China National Engineering Research Center for Big Data Technology and System Huazhong University of Science and TechnologyWuhan 430074China Services Computing Technology and System Lab Huazhong University of Science and TechnologyWuhan 430074China Shenzhen Huazhong University of Science and Technology Research Institute Shenzhen 518057China School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China Cluster and Grid Computing Lab Huazhong University of Science and TechnologyWuhan 430074China

Among the plethora of IoT(Internet of Things)applications,the smart home is one of the ***,the rapid development of the smart home has also made smart home systems a target for ***,researchers have made many efforts to investigate and enhance the security of smart home *** a more secure smart home ecosystem,we present a detailed literature review on the security of smart home ***,we categorize smart home systems’security issues into the platform,device,and communication *** exploring the research and specific issues in each of these security areas,we summarize the root causes of the security flaws in today's smart home systems,which include the heterogeneity of internal components of the systems,vendors'customization,the lack of clear responsibility boundaries and the absence of standard security ***,to better understand the security of smart home systems and potentially provide better protection for smart home systems,we propose research directions,including automated vulnerability mining,vigorous security checking,and data-driven security analysis.

关键词： IoT(Internet of Things) smart home IoT security smart home security

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AFaVS: Accurate Yet Fast Version Switching for Graph Processing systems 39

AFaVS: Accurate Yet Fast Version Switching for Graph Process...

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39th IEEE International Conference on Data Engineering, ICDE 2023

作者： Zheng, Long Ye, Xiangyu Liu, Haifeng Wang, Qinggang Huang, Yu Gui, Chuangyi Yao, Pengcheng Liao, Xiaofei Jin, Hai Xue, Jingling Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Laboratory Wuhan430074 China Zhejiang Lab Hangzhou311121 China Unsw School of Computer Science and Engineering Sydney Australia

ISBN: (纸本)9798350322279

Multi-version graph processing has been widely used to solve many real-world problems. The process of the multi-version graph processing typically includes: (1) a history graph version switching at a specific time and (2) graph processing on this history graph. Existing multi-version graph systems assume ideally that every request for a particular graph version at a particular time will have a corresponding snapshot available. However, in most cases, this is not true. Then existing solutions usually have to settle with an "approximating"version as a substitute, leading to unexpected results for the underlying graph algorithm and thus reducing the practicality of a multi-version graph system for many application scenarios *** this paper, we observe that only a few graph updates have a great impact on the final results. We therefore present AFaVS, a novel multi-version graph system that can improve accuracy effectively in both time- and memory-efficient manners. The cornerstone of AFaVS lies in a novel concept "value"that characterizes the importance of graph updates. AFaVS proposes differential management of updates based on their values and achieves higher accuracy while preserving processing and memory efficiency. AFaVS is also equipped with value-guided version switching and locality-aware optimizations to boost its overall efficiency. Our results on a variety of real-world datasets show that AFaVS outperforms four state-of-the-art multi-version graph systems by 74.35%~95.72% in terms of accuracy improvement and 57.03%~90.44% in terms of memory reduction while introducing less than 2.96% extra computing time. We have deployed AFaVS in a disaster recovery system on the production cluster of Alibaba, achieving 78.8%~90.1% fewer error rates than advanced systems at a comparable efficiency. © 2023 IEEE.

关键词： Efficiency

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λGrapher: A Resource-Efficient Serverless system for GNN Serving through Graph Sharing 24

λGrapher: A Resource-Efficient Serverless System for GNN Se...

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33rd ACM Web Conference, WWW 2024

作者： Hu, Haichuan Liu, Fangming Pei, Qiangyu Yuan, Yongjie Xu, Zichen Wang, Lin National Engineering Research Center for Big Data Technology and System The Services Computing Technology and System Lab Cluster and Grid Computing Lab in the School of Computer Science and Technology Huazhong University of Science and Technology 1037 Luoyu Road Wuhan China Peng Cheng Laboratory Huazhong University of Science and Technology China School of Mathematics and Computer Science Nanchang University China Paderborn University Paderborn Germany

ISBN: (纸本)9798400701719

Graph Neural Networks (GNNs) have been increasingly adopted for graph analysis in web applications such as social networks. Yet, efficient GNN serving remains a critical challenge due to high workload fluctuations and intricate GNN operations. Serverless computing, thanks to its flexibility and agility, offers on-demand serving of GNN inference requests. Alas, the request-centric serverless model is still too coarse-grained to avoid resource waste. Observing the significant data locality in computation graphs of requests, we propose λGrapher, a serverless system for GNN serving that achieves resource efficiency through graph sharing and fine-grained resource allocation. "Grapher features the following designs: (1) adaptive timeout for request buffering to balance resource efficiency and inference latency, (2) graph-centric scheduling to minimize computation and memory redundancy, and (3) resource-centric function management with fine-grained resource allocation catered to the resource sensitivities of GNN operations and function orchestration optimized to hide communication latency. We implement a prototype of λGrapher based on the representative open-source serverless platform Knative and evaluate it with real-world traces from various web applications. Our results show that λGrapher can achieve an average savings of 61.5% in memory resource and 47.2% in computing resource compared with the state of the arts while ensuring GNN inference latency. © 2024 ACM.

关键词： Efficiency

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