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XGCN:a library for large-scale graph neural network recommendations

Frontiers of Computer Science 2024年第3期18卷 247-249页

作者： Xiran SONG Hong HUANG Jianxun LIAN Hai JIN National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China Microsoft Research Asia Beijing 100080China

1 Introduction Graph Neural Networks(GNNs)have gained widespread adoption in recommendation systems,and nowadays there is a pressing need to effectively manage large-scale graph data[1].When it comes to large graphs,GNNs may encounter the scalability issue stemming from their multi-layer messagepassing ***,scaling GNNs has emerged as a crucial research area in recent years,with numerous scaling strategies being proposed.

关键词： scaling gained operations

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Soft-GNN:towards robust graph neural networks via self-adaptive data utilization

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Frontiers of Computer Science 2025年第4期19卷 1-12页

作者： Yao WU Hong HUANG Yu SONG Hai JIN National Engineering Research Center for Big Data Technology and System Service Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China College of Information and Communication National University of Defense TechnologyWuhan 430019China Department of Computer Science and Operations Research Universitéde MontréalMontreal H3C 3J7Canada

Graph neural networks(GNNs)have gained traction and have been applied to various graph-based data analysis tasks due to their high ***,a major concern is their robustness,particularly when faced with graph data that has been deliberately or accidentally polluted with *** presents a challenge in learning robust GNNs under noisy *** address this issue,we propose a novel framework called Soft-GNN,which mitigates the influence of label noise by adapting the data utilized in *** approach employs a dynamic data utilization strategy that estimates adaptive weights based on prediction deviation,local deviation,and global *** better utilizing significant training samples and reducing the impact of label noise through dynamic data selection,GNNs are trained to be more *** evaluate the performance,robustness,generality,and complexity of our model on five real-world datasets,and our experimental results demonstrate the superiority of our approach over existing methods.

关键词： graph neural networks node classification label noise robustness

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Massively parallel algorithms for fully dynamic all-pairs shortest paths

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Frontiers of Computer Science 2024年第4期18卷 201-203页

作者： Chilei WANG Qiang-Sheng HUA Hai JIN Chaodong ZHENG National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China State Key Laboratory for Novel Software Technology Nanjing UniversityNanjing 210023China

1 Introduction In recent years,the Massively Parallel Computation(MPC)model has gained significant ***,most of distributed and parallel graph algorithms in the MPC model are designed for static graphs[1].In fact,the graphs in the real world are constantly *** size of the real-time changes in these graphs is smaller and more *** graph algorithms[2,3]can deal with graph changes more efficiently[4]than the corresponding static graph ***,most studies on dynamic graph algorithms are limited to the single machine ***,a few parallel dynamic graph algorithms(such as the graph connectivity)in the MPC model[5]have been proposed and shown superiority over their parallel static counterparts.

关键词： dynamic shortest gained

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Media Power Measuring via Emotional Contagion

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Journal of Social Computing 2024年第1期5卷 15-35页

作者： Xue Lin Hong Huang Zongya Li Hai Jin National Engineering Research Center for Big Data Technology and System Services Computing Technology and System LabCluster and Grid Computing LabSchool of Computer Science and TechnologyHuazhong University of Science and TechnologyWuhan 430074China School of Journalism Huazhong University of Science and TechnologyWuhan 430074China

Media power,the impact that media have on public opinion and perspectives,plays a significant role in maintaining internal stability,exerting external influence,and shaping international dynamics for nations/***,prior research has primarily concentrated on news content and reporting time,resulting in limitations in evaluating media *** more accurately assess media power,we use news content,news reporting time,and news emotion simultaneously to explore the emotional contagion between *** use emotional contagion to measure the mutual influence between media and regard the media with greater impact as having stronger media *** propose a framework called Measuring Media Power via Emotional Contagion(MMPEC)to capture emotional contagion among media,enabling a more accurate assessment of media power at the media and national/regional *** also interprets experimental results through correlation and causality analyses,ensuring *** analyses confirm the higher accuracy of MMPEC compared to other baseline models,as demonstrated in the context of COVID-19-related news,yielding compelling and interesting insights.

关键词： explainability media power emotional contagion

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AegonKV: A High Bandwidth, Low Tail Latency, and Low Storage Cost KV-Separated LSM Store with SmartSSD-based GC Offloading 23

AegonKV: A High Bandwidth, Low Tail Latency, and Low Storage...

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23rd USENIX Conference on File and Storage Technologies, FAST 2025

作者： Duan, Zhuohui Feng, Hao Liu, Haikun Liao, Xiaofei Jin, Hai Li, Bangyu National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Lab/Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology China

ISBN: (纸本)9781939133458

The key-value separation is renowned for its significant mitigation of the write amplification inherent in traditional LSM trees. However, KV separation potentially increases performance overhead in the management of Value region, especially for garbage collection (GC) operation that is used to reduce the redundant space occupation. In response, many efforts have been made to optimize the GC mechanism for KV separation. However, our analysis indicates that such solution based on trade-offs between CPU and I/O overheads cannot simultaneously satisfy the three requirements of KV separated systems in terms of throughput, tail latency, and space usage. This limitation hinders their real-world application. In this paper, we introduce AegonKV, a "three-birds-one-stone" solution that comprehensively enhances the throughput, tail latency, and space usage of KV separated systems. AegonKV first proposes a SmartSSD-based GC offloading mechanism to enable asynchronous GC operations without competing with LSM read/write for bandwidth or CPU. AegonKV leverages offload-friendly data structures and hardware/software execution logic to address the challenges of GC offloading. Experiments demonstrate that AegonKV achieves the largest throughput improvement of 1.28-3.3 times, a significant reduction of 37%-66% in tail latency, and 15%-85% in space overhead compared to existing KV separated systems. © 2025 FAST. All Rights Reserved.

关键词： Digital storage

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Evaluating RISC-V Vector Instruction Set Architecture Extension with Computer Vision Workloads

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Journal of Computer Science & technology 2023年第4期38卷 807-820页

作者：李若时彭平邵志远金海郑然 National Engineering Research Center for Big Data Technology and System Huazhong University of Science and Technology Wuhan 430074China Services Computing Technology and System Laboratory Huazhong University of Science and TechnologyWuhan 430074 China Cluster and Grid Computing Lab Huazhong University of Science and TechnologyWuhan 430074China

Computer vision(CV)algorithms have been extensively used for a myriad of applications *** the multimedia data are generally well-formatted and regular,it is beneficial to leverage the massive parallel processing power of the underlying platform to improve the performances of CV *** Instruction Multiple data(SIMD)instructions,capable of conducting the same operation on multiple data items in a single instruction,are extensively employed to improve the efficiency of CV *** this paper,we evaluate the power and effectiveness of RISC-V vector extension(RV-V)on typical CV algorithms,such as Gray Scale,Mean Filter,and Edge *** our examinations,we show that compared with the baseline OpenCV implementation using scalar instructions,the equivalent implementations using the RV-V(version 0.8)can reduce the instruction count of the same CV algorithm up to 24x,when processing the same input ***,the actual performances improvement measured by the cycle counts is highly related with the specific implementation of the underlying RV-V *** our evaluation,by using the vector co-processor(with eight execution lanes)of Xuantie C906,vector-version CV algorithms averagely exhibit up to 2.98x performances speedups compared with their scalar counterparts.

关键词： RISC-V vector extension single instruction multiple data(SIMD) computer vision OpenCV

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TIGA: Towards Efficient Near data Processing in SmartNICs-based Disaggregated Memory systems 24

TIGA: Towards Efficient Near Data Processing in SmartNICs-ba...

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61st ACM/IEEE Design Automation Conference, DAC 2024

作者： Duan, Zhuohui Yu, Zelin Liu, Haikun Liao, Xiaofei Jin, Hai Zheng, Shijie Wu, Sihan National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab Huazhong University of Science and Technology Wuhan430074 China

ISBN: (纸本)9798400706011

Memory disaggregation, facilitated by Smart Network Interface Cards (SmartNICs), has emerged as a cost-effective approach for sharing memory resources in data centers. However, current SoC-based SmartNICs face several challenges for supporting near-data processing (NDP) in disaggregated memory (DM) systems effectively, such as inefficient resource allocation for SmartNICs employed in NDP, and the lack of collaboration between SmartNICs on data nodes and CPUs on compute nodes. To address these issues, we propose TIGA, an efficient NDP framework for SmartNICs-based disaggregated memory systems. We propose an adaptive resource allocator to fully utilize the SoC cores among NDP engines automatically, and a SmartNIC-CPU cooperative computing mechanism to schedule NDP tasks among CPUs and SmartNICs. We prototype TIGA with FPGAs and evaluate it with several typical workloads. Experimental results show that TIGA significantly improves the efficiency of NDP tasks in DM systems compared with state-of-the-art SmartNIC-based co-processing schemes. © 2024 Copyright is held by the owner/author(s). Publication rights licensed to ACM.

关键词： Storage allocation (computer)

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P3DC:Reducing DRAM Cache Hit Latency by Hybrid Mappings

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Journal of Computer Science & technology 2024年第6期39卷 1341-1360页

作者： Ye Chi Ren-Tong Guo Xiao-Fei Liao Hai-Kun Liu Jianhui Yue National Engineering Research Center for Big Data Technology and System Wuhan 430074China Services Computing Technology and System Laboratory Wuhan 430074China Cluster and Grid Computing Laboratory Wuhan 430074China School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China School of Big Data and Internet Shenzhen Technology UniversityShenzhen 518118China Department of Computer Science Michigan Technological UniversityHoughton 49931-1295U.S.A.

Die-stacked dynamic random access memory(DRAM)caches are increasingly advocated to bridge the performance gap between the on-chip cache and the main *** fully realize their potential,it is essential to improve DRAM cache hit rate and lower its cache hit *** order to take advantage of the high hit-rate of set-association and the low hit latency of direct-mapping at the same time,we propose a partial direct-mapped die-stacked DRAM cache called *** design is motivated by a key observation,i.e.,applying a unified mapping policy to different types of blocks cannot achieve a high cache hit rate and low hit latency *** address this problem,P3DC classifies data blocks into leading blocks and following blocks,and places them at static positions and dynamic positions,respectively,in a unified set-associative *** also propose a replacement policy to balance the miss penalty and the temporal locality of different *** addition,P3DC provides a policy to mitigate cache thrashing due to block type *** results demonstrate that P3DC can reduce the cache hit latency by 20.5%while achieving a similar cache hit rate compared with typical set-associative caches.P3DC improves the instructions per cycle(IPC)by up to 66%(12%on average)compared with the state-of-the-art direct-mapped cache—BEAR,and by up to 19%(6%on average)compared with the tag-data decoupled set-associative cache—DEC-A8.

关键词： die-stacked dynamic random access memory(DRAM) cache set-associative direct-mapped hit latency

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RTGA: A Redundancy-free Accelerator for High-Performance Temporal Graph Neural Network Inference 24

RTGA: A Redundancy-free Accelerator for High-Performance Tem...

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61st ACM/IEEE Design Automation Conference, DAC 2024

作者： Yu, Hui Zhang, Yu Tan, Andong Lu, Chenze Zhao, Jin Liao, Xiaofei Jin, Hai Liu, Haikun National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology China

ISBN: (纸本)9798400706011

Temporal Graph Neural Network (TGNN) has attracted much research attention because it can capture the dynamic nature of complex networks. However, existing solutions suffer from redundant computation overhead and excessive off-chip communications for TGNN inference because they often rely on redundant graph sampling and repeatedly fetching the features and vertex memory. This paper proposes a redundancy-free accelerator, RTGA, for high-performance TGNN inference. Specifically, RTGA proposes a redundancy-aware execution approach with temporal tree into a novel accelerator design to effectively eliminate unnecessary data processing for fewer redundant computations and off-chip communications and also designs a temporal-aware data caching method to improve data locality for TGNN. We have implemented and evaluated RTGA on a Xilinx Alveo U280 FPGA card. Compared with cutting-edge software solutions (i.e., TGN and TGL) and hardware solutions (i.e., BlockGNN and FlowGNN), RTGA improves the performance of TGNN inference by an average of 473.2x, 87.4x, 8.2x, and 6.9x and saves energy by 542.8x, 102.2x, 9.4x, and 8.3x, respectively. © 2024 Copyright is held by the owner/author(s). Publication rights licensed to ACM.

关键词： Spatio-temporal data

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Towards Stricter Black-box Integrity Verification of Deep Neural Network Models 24

Towards Stricter Black-box Integrity Verification of Deep Ne...

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32nd ACM International Conference on Multimedia, MM 2024

作者： He, Chaoxiang Bai, Xiaofan Ma, Xiaojing Zhu, Bin B. Hu, Pingyi Fu, Jiayun Jin, Hai Zhang, Dongmei Huazhong University of Science and Technology Hubei Wuhan China Shanghai Jiao Tong University Shanghai China Microsoft Corporation Beijing China National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Hubei Engineering Research Center on Big Data Security Hubei Key Laboratory of Distributed System Security School of Cyber Science and Engineering Huazhong University of Science and Technology China National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology China

ISBN: (纸本)9798400706868

Cloud-based machine learning services offer significant advantages but also introduce the risk of tampering with cloud-deployed deep neural network (DNN) models. Black-box integrity verification (BIV) allows model owners and end-users to determine if a cloud-deployed DNN model has been tampered with by examining only the top-1 label responses. Fingerprinting generates fingerprint samples to query the model, achieving BIV with no impact on the model's accuracy. In this paper, we present BIVBench, the first comprehensive benchmark for BIV of DNN models. BIVBench covers 16 types of model modifications, providing extensive coverage of practical modification scenarios. Our analysis reveals that existing fingerprinting methods, which are typically focused on significant tampering, lack the sensitivity needed to effectively detect subtle yet common and potentially severe modifications. To address this limitation, we propose MiSentry (Model Integrity Sentry), a novel fingerprinting method that leverages meta-learning. MiSentry strategically incorporates a few subtly modified models into the meta-learning model zoo and maximizes the divergence of output predictions between the target model and the modified models in the model zoo to generate highly sensitive, generalizable, and effective fingerprint samples. Extensive evaluations using BIVBench demonstrate that MiSentry outperforms existing state-of-the-art methods overall and significantly surpasses them in detecting subtle modifications. The BIVBench and supplementary materials are available at: https://***/CGCL-codes/BIVBench. © 2024 ACM.

关键词： Deep neural networks

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