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2013 IEEE Seventh International Symposium on Service-Oriented System Engineering

作者： Dongsheng Li Yixing Chen Richard Hu Hai National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology China Raffles Business Institute Singapore

ISBN: (纸本)9781467356596

Data skew is an important reason for the emergence of stragglers in MapReduce-like cloud systems. In this paper, we propose a Skew-Aware Task Scheduling (SATS) mechanism for iterative applications in MapReduce-like systems. The mechanism utilizes the similarity of data distribution in adjacent iterations of iterative applications to reduce the straggle problem caused by data skew. It collects the data distribution information during the execution of tasks for the current iteration, and uses the information to guide data partitioning in tasks for the next iteration. We implement the mechanism in the HaLoop system and deploy it in a cluster. Experiments show that the proposed mechanism could deal with the data skew and improve the load balancing effectively.

关键词： Load management distributed databases File systems Processor scheduling Computational modeling Data models Data structures

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Device View Redundancy: an adaptive low-overhead fault tolerance mechanism for many-core system

Device View Redundancy: an adaptive low-overhead fault toler...

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International Workshop on Intelligent Communication and Social Networks

作者： Wentao Jia Chunyuan Zhang Jian Fu National Key Laboratory of Parallel and Distributed Processing College of Computer National University of Defense Technology Institute for Informatics University of Amsterdam

ISBN: (纸本)9781479909735

Continued increasing of fault rate in integrate circuit makes processors more susceptible to errors, especially many-core processor. Meanwhile, most systems or applications do not need full fault coverage, which has excessive overhead. So on-demand fault tolerance is desired for these applications. In this paper, we propose an adaptive low-overhead fault tolerance mechanism for many-core system, called Device View Redundancy (DVR). It treats fault tolerance as a device that can be configured and used by application when high reliability is needed. Nevertheless, DVR exploits the idle resources for low-overhead fault tolerance, which is based on the observation that the utilization of many-core system is low due to lack of parallelism in application. Finally, the experiment shows that the performance overhead of DVR is reduced by 16% to 98% compared with full Dual Modular Redundancy (DMR).

关键词： On-demand redundancy Idle resource exploitation Dynamic coupling Low-overhead Many core system

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The influences of model parameters on the characteristics of memristors

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Chinese Physics B 2012年第4期21卷 576-585页

作者：周静黄达 National Laboratory for Parallel and Distributed Processing School of ComputerNational University of Defense TechnologyChangsha 410073China

As the fourth passive circuit component, a memristor is a nonlinear resistor that can ＂remember＂ the amount of charge passing through it. The characteristic of ＂remembering＂ the charge and non-volatility makes memristors great potential candidates in many fields. Nowadays, only a few groups have the ability to fabricate memristors, and most researchers study them by theoretic analysis and simulation. In this paper, we first analyse the theoretical base and characteristics of memristors, then use a simulation program with integrated circuit emphasis as our tool to simulate the theoretical model of memristors and change the parameters in the model to see the influence of each parameter on the characteristics. Our work supplies researchers engaged in memristor-based circuits with advice on how to choose the proper parameters.

关键词： memristor I-V characteristics simulation program with integrated circuit emphasis

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SPICE modeling of memristors with multilevel resistance states

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Chinese Physics B 2012年第9期21卷 594-600页

作者：方旭东唐玉华吴俊杰 National Laboratory for Parallel and Distributed Processing School of ComputerNational University of Defense Technology Department of Computer Science and Technology School of ComputerNational University of Defense Technology

With CMOS technologies approaching the scaling ceiling, novel memory technologies have thrived in recent years, among which the memristor is a rather promising candidate for future resistive memory （RRAM）. Memristor＇s potential to store multiple bits of information as different resistance levels allows its application in multilevel cell （MCL） tech- nology, which can significantly increase the memory capacity. However, most existing memristor models are built for binary or continuous memristance switching. In this paper, we propose the simulation program with integrated circuits emphasis （SPICE） modeling of charge-controlled and flux-controlled memristors with multilevel resistance states based on the memristance versus state map. In our model, the memristance switches abruptly between neighboring resistance states. The proposed model allows users to easily set the number of the resistance levels as parameters, and provides the predictability of resistance switching time if the input current/voltage waveform is given. The functionality of our models has been validated in HSPICE. The models can be used in multilevel RRAM modeling as well as in artificial neural network simulations.

关键词： memristor multilevel cell SPICE model

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Structure and method for hardware acceleration of variable data set management

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Hunan Daxue Xuebao/Journal of Hunan University Natural Sciences 2013年第11 SUPPL.期40卷 68-73页

作者： Xu, Jin-Bo Dou, Yong Sun, Cai-Xia Dong, Ya-Zhuo Wang, Shao-Gang Lu, Ping-Jing Zhang, Jun College of Computer National Univ of Defense Technology Changsha Hunan 410073 China National Laboratory for Parallel and Distributed Processing National Univ of Defense Technology Changsha Hunan 410073 China Unit 91655 People's Liberation Army Beijing 100036 China

A general hardware structure was proposed to accelerate variable data set management, which was designed to accept instructions flexibly and accomplish the commonly used functions and some more complicated functions of the linked-list data structure .The structure can access the data based on both pointer and address mechanism. In order to fully utilize the limited memory resources, we proposed a memory recycle scheme to reuse the memory space where the data have been deleted. Experimental results on FPGA show that our proposal can accelerate the variable data set management. Only few hardware resources were used and it consumed pretty low power. Compared with the software linked-list structure in PC, our proposal in FPGA achieved high speedups.

关键词： Field programmable gate arrays (FPGA)

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PartialRC: A Partial Recomputing Method for Efficient Fault Recovery on GPGPUs

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Journal of computer Science & Technology 2012年第2期27卷 240-255页

作者：徐新海杨学军薛京灵林宇斐林一松 National Laboratory for Parallel and Distributed Processing School of ComputerNational University of Defense Technology Programming Languages and Compilers Group School of Computer Science and Engineering University of New South Wales

GPGPUs are increasingly being used to as performance accelerators for HPC （High Performance Computing） applications in CPU/GPU heterogeneous computing systems, including TianHe-1A, the world＇s fastest supercomputer in the TOP500 list, built at NUDT （national University of Defense Technology） last year. However, despite their performance advantages, GPGPUs do not provide built-in fault-tolerant mechanisms to offer reliability guarantees required by many HPC applications. By analyzing the SIMT （single-instruction, multiple-thread） characteristics of programs running on GPGPUs, we have developed PartialRC, a new checkpoint-based compiler-directed partial recomputing method, for achieving efficient fault recovery by leveraging the phenomenal computing power of GPGPUs. In this paper, we introduce our PartialRC method that recovers from errors detected in a code region by partially re-computing the region, describe a checkpoint-based faulttolerance framework developed on PartialRC, and discuss an implementation on the CUDA platform. Validation using a range of representative CUDA programs on NVIDIA GPGPUs against FullRC （a traditional full-recomputing Checkpoint-Rollback-Restart fault recovery method for CPUs） shows that PartialRC reduces significantly the fault recovery overheads incurred by FullRC, by 73.5% when errors occur earlier during execution and 74.6% when errors occur later on average. In addition, PartialRC also reduces error detection overheads incurred by FullRC during fault recovery while incurring negligible performance overheads when no fault happens.

关键词： GPGPU partial recomputing fault tolerance CUDA checkpointing

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Orthogonal Nonnegative Locally Linear Embedding

Orthogonal Nonnegative Locally Linear Embedding

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IEEE International Conference on Systems, Man, and Cybernetics

作者： Lei Wei Naiyang Guan Xiang Zhang Zhigang Luo Dacheng Tao National Laboratory for Parallel and Distributed Processing School of Computer Science National University of Defense Technology Changsha 410073 P.R. China These authors contributed equally to this paper National Laboratory for Parallel and Distributed Processing School of Computer Science National University of Defense Technology Changsha 410073 P.R. China Centre for Quantum Computation and Intelligence Systems and Faculty of Engineering and Information Technology University of Technology Sydney Sydney NSW 2007 Australia

ISBN: (纸本)9781479906505

Nonnegative matrix factorization (NMF) decomposes a nonnegative dataset X into two low-rank nonnegative factor matrices, i.e., W and H, by minimizing either Kullback-Leibler (KL) divergence or Euclidean distance between X and WH. NMF has been widely used in pattern recognition, data mining and computer vision because the non-negativity constraints on both W and H usually yield intuitive parts-based representation. However, NMF suffers from two problems: 1) it ignores geometric structure of dataset, and 2) it does not explicitly guarantee partsbased representation on any datasets. In this paper, we propose an orthogonal nonnegative locally linear embedding (ONLLE) method to overcome aforementioned problems. ONLLE assumes that each example embeds in its nearest neighbors and keeps such relationship in the learned subspace to preserve geometric structure of a dataset. For the purpose of learning parts-based representation, ONLLE explicitly incorporates an orthogonality constraint on the learned basis to keep its spatial locality. To optimize ONLLE, we applied an efficient fast gradient descent (FGD) method on Stiefel manifold which accelerates the popular multiplicative update rule (MUR). The experimental results on real-world datasets show that FGD converges much faster than MUR. To evaluate the effectiveness of ONLLE, we conduct both face recognition and image clustering on real-world datasets by comparing with the representative NMF methods.

关键词： Nonnegative matrix factorization Locally linear embedding Fast gradient descent Stiefel manifold Dataset Nonnegative matrix decomposition geometrical construction NMF protocol images embedding Flue gas desulfurization Nearest neighbor Orthogonal

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Mining Software Profile across Multiple Repositories for Hierarchical Categorization

Mining Software Profile across Multiple Repositories for Hie...

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International Conference on Software Maintenance (ICSM)

作者： Tao Wang Huaimin Wang Gang Yin Charles X. Ling Xiang Li Peng Zou National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha China Department of Computer Science The University of Western Ontario London Ontario Canada Academy of Equipment Beijing China

ISBN: (纸本)9781467352185

The large amounts of software repositories over the Internet are fundamentally changing the traditional paradigms of software maintenance. Efficient categorization of the massive projects for retrieving the relevant software in these repositories is of vital importance for Internet-based maintenance tasks such as solution searching, best practices learning and so on. Many previous works have been conducted on software categorization by mining source code or byte code, which are only verified on relatively small collections of projects with coarse-grained categories or clusters. However, Internet-based software maintenance requires finer-grained, more scalable and language-independent categorization approaches. In this paper, we propose a novel approach to hierarchically categorize software projects based on their online profiles across multiple repositories. We design a SVM-based categorization framework to classify the massive number of software hierarchically. To improve the categorization performance, we aggregate different types of profile attributes from multiple repositories and design a weighted combination strategy which assigns greater weights to more important attributes. Extensive experiments are carried out on more than 18,000 projects across three repositories. The results show that our approach achieves significant improvements by using weighted combination, and the overall precision, recall and F-Measure can reach 71.41%, 65.60% and 68.38% in appropriate settings. Compared to the previous work, our approach presents competitive results with 123 finer-grained and multi-layered categories. In contrast to those using source code or byte code, our approach is more effective for large-scale and language-independent software categorization.

关键词： Databases Collaboration Servers Software maintenance Internet Data mining

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Recent advances on trusted computing in China

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Chinese Science Bulletin 2012年第35期57卷 4529-4532页

作者： DONG Wei CHEN LiQian School of Computer National University of Defense TechnologyChangsha 410073China National Laboratory for Parallel and Distributed Processing Changsha 410073China

This article highlights some recent research advances on trusted computing in China,focusing mainly on the methodologies and technologies related to trusted computing module,trusted computing platform,trusted network ... 详细信息

关键词：可信计算平台中国计算模块网络连接软件

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SCautz:a high performance and fault-tolerant datacenter network for modular datacenters

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Science China(Information Sciences) 2012年第7期55卷 1493-1508页

作者： HUANG Feng,LU XiCheng,LI DongSheng & ZHANG YiMing national Lab for parallel and distributed processing,school of computer,national University of Defense Technology,Changsha 410073,China 1. National Lab for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha 410073 China

Modular datacenters (MDCs) use shipping containers,encapsulating thousands of servers,as large pluggable building blocks for mega *** MDC’s "service-free" model poses stricter demand on fault-tolerance of the modular datacenter network (MDCN).Based on the "scale-out" principle,in this paper we propose SCautz,a novel hybrid intra-container network for *** comprises a base Kautz topology,created by interconnecting servers,and a small number of COTS (commercial off-the-shelf) ***,each switch connects a specific number of servers forming "clusters",which,as logical nodes,form multiple higher-level logical Kautz ***’s hybrid structure has several ***,it supports multiple running modes for the MDC,while its full structure increases network capacity ***,it retains the throughput for processing one-to-x traffic in the presence of ***,it achieves much more graceful network performance degradation than computation and storage capacity *** from theoretical analysis and simulations show that SCautz is more viable for intra-container networks.

关键词： modular datacenter network container Kautz fault-tolerant

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