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Design, Automation and Test in Europe Conference and Exhibition

作者： Xuanzeng Lihong Feng Yangfeng Su Wei Cai D. Zhou C. Chiang ASIC & System State-key Laboratory Microelectronics Department Fudan University Shanghai China Mathemaitics Department Fudan University Shanghai China Department of Mathematics University of North Carolina Charlotte Charlotte NC USA Departemnt of Electrical Engineering University of Texas Dallas Richardson TX USA Mountain View Synopsys Inc. CA USA

ISBN: (纸本)9783981080100

In this paper, a wavelet based approach is proposed for the model order reduction of linear circuits in time domain. Compared with Chebyshev reduction method, the wavelet reduction approach can achieve smaller reduced order circuits with very high accuracy, especially for those circuits with strong singularities. Furthermore, to compute the basis function coefficient vectors, a fast Sylvester equation solver is proposed, which works more than one or two orders faster than the vector equation solver employed by Chebyshev reduction method. The proposed wavelet method is also compared with the frequency domain model reduction method, which may loose accuracy in time domain. Both theoretical analysis and experiment results have demonstrated the high speed and high accuracy of the proposed method

关键词： Wavelet domain Chebyshev approximation Frequency domain analysis Integrated circuit interconnections Equations Transfer functions Mathematical model Application specific integrated circuits Laboratories microelectronics

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Non-holonomy in im torque control

Non-holonomy in im torque control

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International Workshop on Advanced Motion Control (AMC)

作者： B. Crcar P. Cafuta G. Stumberger H.R. Cortes A.M. Stankovic Electrical Engineering Department Al-Azhar University Cairo Egypt School of Engineering Science and Design Glasgow Caledonian University Glasgow Scotland UK Valley Higher Institute for Engineering and Technology Science Valley Academy Cairo Egypt Tech. University of Delft THE NETHERLANDS State Key Laboratory of ASIC & System Fudan University Shanghai CHN

In the paper IM torque control is studied as an example of non-holonomic system with drift terms. Following the famous Brockett integrator problem several control propositions are introduced. The paper extends the control scheme from the state to the output control in several steps. By introducing adjusted amplitude, frequency and phase modulation of the IM stator current vector, the rotor flux linkage vector is implicitly forced to generate required periodic orbits that satisfy nonholonomic constraint. Improvements in the transient feedback performance, maximal steady-state efficiency, avoidance of singularities and sufficient robustness are actually achieved by making the current modulation dependent from the torque error signal. In the contrast with the original work instead of global only local stability could be assured. Simulation and experimental results illustrate main characteristics of the proposed control

关键词： Torque control Frequency Phase modulation Stators Rotors Couplings Orbits Feedback Steady-state Robustness

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New model of ferroelectric capacitor based on C-V, I-V, Q-V Characteristics

Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors

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Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors 2005年第5期26卷 984-989页

作者： Chen, Xiaoming Tang, Ting'ao State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai 200433 China

A new model is developed for describing the electrical behavior of ferroelectric capacitors. By modeling the ferroelectric capacitor as a switching capacitor (dipole capacitor) in series with a non-switching capacitor (linear capacitor) and this dipole capacitor as a collection of dipoles with a top electrode and a bottom electrode, and by assuming the probability density functions of dipoles' coercive voltages (positive and negative) as t-distribution according to experiment results of ferroelectric capacitors' C-V characteristic, the C-V, I-V, and Q-V expressions of ferroelectric capacitors are derived, 'and these expressions are described with only six parameters. The simulated results from these expressions are quite fitted with experiment results.

关键词： Capacitors

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FPGA Placement Using Genetic Algorithm with Simulated Annealing

FPGA Placement Using Genetic Algorithm with Simulated Anneal...

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2005 6th International Conference on asic

作者： M.Yang A.E.A.Almaini L.Wang Pengjun Wang State Key Laboratory of ASIC & System School of MicroelectronicsFudan University Institute of Circuits and Systems Ningbo University

A mixed Genetic Algorithm and Simulated Annealing (GASA) algorithm is used for the placement of symmetrical *** proposed algorithm includes 2 stage *** the first stage process it optimizes placement solutions globally using *** the second stage process it locally improves *** overcomes the slow convergence of genetic algorithm in the late phase of the process of genetic *** results show that GASA consumes less CPU time than GA and could achieve performance as good as versatile placement and routing tool in terms of placement cost.

关键词： FPGA Placement Using Genetic Algorithm with Simulated Annealing

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FPGA placement using genetic algorithm with simulated annealing

FPGA placement using genetic algorithm with simulated anneal...

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asicON 2005: 2005 6th International Conference on asic

作者： Yang, M. Almaini, A.E.A. Wang, L. Wang, Pengjun School of Engineering Napier University 10 Colinton Rd. Edinburgh EH10 5DT United Kingdom State Key Laboratory of ASIC and System School of Microelectronics Fudan University Shanghai China Institute of Circuits and Systems Ningbo University Ningbo 315211 China

ISBN: (纸本)0780392108

A mixed Genetic Algorithm and Simulated Annealing (GASA) algorithm is used for the placement of symmetrical FPGA. The proposed algorithm includes 2 stage processes. In the first stage process it optimizes placement solutions globally using GA. In the second stage process it locally improves solution. GASA overcomes the slow convergence of genetic algorithm in the late phase of the process of genetic algorithm. The results show that GASA consumes less CPU time than GA and could achieve performance as good as versatile placement and routing tool in terms of placement cost. © 2005 IEEE.

关键词： Field programmable gate arrays (FPGA)

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High-performance systolic arrays for band matrix multiplication

High-performance systolic arrays for band matrix multiplicat...

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IEEE International Symposium on Circuits and systems (ISCAS)

作者： Yun Yang Wenqing Zhao Y. Inoue Graduate School of Information Production and Systems Waseda University Kitakyushu Japan ASIC & System State-Key-Laboratory Microelectronics Department Fudan University Shanghai China

Band matrix multiplication is widely used in DSP systems. However, for band matrix multiplication, the traditional Kung-Leiserson systolic array cannot be realized with high cell-efficiency. Three high-performance band matrix multiplication systolic arrays (BMMSA) are presented, based on the ideas of "matrix compression" and "super pipelining". These new systolic arrays are realized by compressing the data matrix skillfully and adjusting the operating sequence carefully. The results show that the best systolic array for band matrix multiplication uses almost 100% of the processing elements (PE) in each step. Also, these modifications increase the operation speed, and, at best spend, only 1/3 of the processing time is required to complete the multiplication operation.

关键词： Systolic arrays Digital signal processing Computer architecture Concurrent computing Throughput Delay Yarn Application specific integrated circuits Production systems microelectronics

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Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires

Power-optimal simultaneous buffer insertion/sizing and unifo...

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IEEE International Symposium on Circuits and systems (ISCAS)

作者： Ruiming Li Dian Zhou Jin Liu Xuan Zeng Department of Electrical Engineering School of Engineering and Computer Sciences University of Texas Dallas Richardson TX USA ASIC & System State-key Laboratory Microelectronics Department Fudan University Shanghai China

ISBN: (纸本)0780388348

This paper studies the problems of minimizing power dissipation of an interconnect wire by simultaneously considering buffer insertion/sizing and wire sizing. We obtain optimal solutions for the problems of optimizing power dissipation for simultaneous buffer insertion/sizing and uniform wire sizing (BISUWS) under the delay constraints. These solutions can be used to estimate the power dissipation in the interconnect designs.

关键词： Wire Delay Power dissipation Capacitance Chromium MOS devices Circuits Threshold voltage Power engineering and energy Power engineering computing

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Preserving the film coefficient as a parameter in the compact thermal model for fast electrothermal simulation

Preserving the film coefficient as a parameter in the compac...

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作者： Feng, Lihong H. Rudnyi, Evgenii B. Korvink, Jan G. IEEE ASIC and System State-key Laboratory Microelectronics Department Fudan University Shanghai 200433 China University of Freiburg D-79085 Freiburg Germany University of Freiburg Freiburg Germany Department of Examination Board Faculty of Applied Sciences IMTEK ETH Zurich Ritsumeikan University of Kusatsu Japan Kyoto University Kyoto Japan Technical Program Committees

Compact thermal models are often used during joint electrothermal simulation of microelectromechanical systems (MEMS) and circuits. Formal model reduction allows generation of compact thermal models automatically from high-dimensional finite-element models. Unfortunately, it requires fixing a film coefficient employed to describe the convection boundary conditions. As a result, compact models produced by model reduction do not comply with the requirements of being boundary condition independent. In the present paper, the authors suggest an approach of successive series expansion with respect to the film coefficient as well as to the frequency during model reduction that allows to overcome the problem and keep the film coefficient as a symbolic parameter in the reduced model. The approach is justified with a numerical example of electrothermal simulation of a microthruster unit. © 2005 IEEE.

关键词： Thermoanalysis

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Reaction mechanism of ZrCl4 with Ge/Si(100)-(2 × 1): A density functional theory study of initial stage of ZrO2 atomic layer deposition on SiGe alloy surface

Reaction mechanism of ZrCl4 with Ge/Si(100)-(2 × 1): A dens...

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2004 7th International Conference on Solid-state and Integrated Circuits Technology Proceedings, ICSICT 2004

作者： Chen, Wei Zhang, David Wei Ren, Jie Lu, Hong-Liang Zhang, Jian-Yun Xu, Min Wang, Ji-Tao Wang, Li-Kong State Key Laboratory of ASIC and System Department of Microelectronics Fudan University Shanghai 200433 China

The reaction mechanism of ZrCl4 adsorption and dissociation on Ge/Si(100)-(2×1) surface is investigated with density functional theory. The Si-Si, Si-Ge and Ge-Ge one-dimer cluster models are employed in the calculation to represent Ge/Si(100)-(2×1) surface with different Ge composition. The reaction of ZrCl4 with hydroxylated Ge/Si(100)-(2×1) surface forms a bridged ZrCl2 site, while on H-passivated surface ZrCl3 site is formed. The reaction energy barrier of ZrCl4 with H-passivated SiGe surface is much higher than ZrCl4 with hydroxylated SiGe surface, which indicates that the reaction proceeds more slowly on H-passivated surface than on OH-terminated surface. The adsorbates and products on Ge-Ge dimer cluster model of Ge/Si(100)-(2×1) are most stable while structures on Si-Si dimer cluster model are least stable. ©2004 IEEE.

关键词： Zirconium compounds

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Reactively sputtered vanadium nitride as diffusion barrier for copper interconnect

Reactively sputtered vanadium nitride as diffusion barrier f...

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International Conference on Solid-state and Integrated Circuit Technology

作者： Xin-Ping Qu Mi Zhou Guo-Ping Ru Bing-Zong Li ASIC & System State Key Laboratory Department of Microelectronics Fuden University Shanghai China

ISBN: (纸本)078038511X

VN thin film was studied as diffusion barrier between copper and Si. The VN film was prepared by reactive ion beam sputtering. X-ray diffraction (XRD), Auger electron spectroscopy (AES) and scanning electron microscopy (SEM) were applied to characterize the thin film properties. The as-deposited VN is amorphous and can be thermal stable up to 800/spl deg/C annealing. The ultrathin VN shows good diffusion barrier properties for copper.

关键词： Copper Sputtering Scanning electron microscopy Semiconductor thin films Semiconductor films Ion beams X-ray diffraction X-ray scattering Spectroscopy Amorphous materials

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