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40th IEEE International Conference on Data Engineering, ICDE 2024

作者： Cheng, Feng Xiao, Jiang Liu, Cunyang Zhang, Shijie Zhou, Yifan Li, Bo Li, Baochun Jin, Hai School of Computer Science and Technology Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab China Hong Kong University of Science and Technology Hong Kong University of Toronto Canada

ISBN: (纸本)9798350317152

Directed Acyclic Graph (DAG)-based blockchain (a.k.a distributed ledger) has become prevalent for supporting highly concurrent applications. Its inherent parallel data structure accelerates block generation significantly, shifting the bottleneck from performance to storage scalability. An intuitive solution is to apply state sharding that divides the entire ledger (i.e., transactions and states) into multiple shards. While each node only stores proportional transactions, it suffers from the challenges of storing and ensuring the processing consistency of cross-shard transactions. In this paper, we propose SharDAG, a new mechanism that leverages adaptive sharding for DAG-based blockchains to achieve high performance and strong consistency. The key idea of SharDAG is to exploit unique characteristics -silent assets -and design a lightweight processing mechanism based on avatar account caching. Furthermore, we design a Byzantine resilient cross-shard verification mechanism with a theoretically optimal number of participating nodes, which guarantees the consistency and security of avatar account aggregation. Our comprehensive evaluations on real-world workloads demonstrate that SharDAG presents up to 3.8 x throughput improvement compared to the state-of-the-art and reduces the storage overhead of cross-shard transactions. © 2024 IEEE.

关键词： Blockchain

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Seer: Accelerating Block chain Transaction Execution by Fine-Grained Branch Prediction 51st

Seer: Accelerating Block chain Transaction Execution by Fine...

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51st International Conference on Very Large Data Bases, VLDB 2025

作者： Zhang, Shijie Cheng, Ru Liu, Xinpeng Xiao, Jiang Jin, Hai Li, Bo National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan430074 China Department of Computer Science and Engineering Hong Kong University of Science and Technology Hong Kong

Increasingly popular decentralized applications (dApps) with complex application logic incur significant overhead for executing smart contract transactions, which greatly limits public block chain performance. Pre-executing transactions off the critical path can mitigate substantial I/O and computation costs during execution. However, pre-execution does not yield any state transitions, rendering the system state inconsistent with actual execution. This inconsistency can lead to deviations in pre-execution paths when processing smart contracts with multiple state-related branches, thus diminishing pre-execution effectiveness. In this paper, we develop Seer, a novel public block chain execution engine that incorporates fine-grained branch prediction to fully exploit pre-execution effectiveness. Seerpredicts state-related branches using a two-level prediction approach, reducing inconsistent execution paths more efficiently than executing all possible branches. To enable effective reuse of pre execution results, Seer employs checkpoint-based fast-path execution, enhancing transaction execution for both successful and unsuccessful predictions. Evaluations with realistic block chain workloads demonstrate that Seer delivers an average of 27.7× transaction-level speedup and an overall 20.6× speedup in the execution phase over vanilla Ethereum, outperforming existing block chain execution acceleration solutions. © 2025, VLDB Endowment, All rights reserved.

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LibAMM: Empirical Insights into Approximate computing for Accelerating Matrix Multiplication 38

LibAMM: Empirical Insights into Approximate Computing for Ac...

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38th Conference on Neural Information Processing systems, NeurIPS 2024

作者： Zeng, Xianzhi Jiang, Wenchao Zhang, Shuhao National Engineering Research Center for Big DataTechnology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan430074 China Nanyang Technological University Singapore Singapore University of Technology and Design Singapore

Matrix multiplication (MM) is pivotal in fields from deep learning to scientific computing, driving the quest for improved computational efficiency. Accelerating MM encompasses strategies like complexity reduction, parallel and distributed computing, hardware acceleration, and approximate computing techniques, namely AMM algorithms. Amidst growing concerns over the resource demands of large language models (LLMs), AMM has garnered renewed focus. However, understanding the nuances that govern AMM's effectiveness remains incomplete. This study delves into AMM by examining algorithmic strategies, operational specifics, dataset characteristics, and their application in real-world tasks. Through comprehensive testing across diverse datasets and scenarios, we analyze how these factors affect AMM's performance, uncovering that the selection of AMM approaches significantly influences the balance between efficiency and accuracy, with factors like memory access playing a pivotal role. Additionally, dataset attributes are shown to be vital for the success of AMM in applications. Our results advocate for tailored algorithmic approaches and careful strategy selection to enhance AMM's effectiveness. To aid in the practical application and ongoing research of AMM, we introduce LibAMM -a toolkit offering a wide range of AMM algorithms, benchmarks, and tools for experiment management. LibAMM aims to facilitate research and application in AMM, guiding future developments towards more adaptive and context-aware computational solutions. © 2024 Neural information processing systems foundation. All rights reserved.

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Towards High-throughput and Low-latency Billion-scale Vector Search via CPU/GPU Collaborative Filtering and Re-ranking 23

Towards High-throughput and Low-latency Billion-scale Vector...

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23rd USENIX Conference on File and Storage Technologies, FAST 2025

作者： Tian, Bing Liu, Haikun Tang, Yuhang Xiao, Shihai Duan, Zhuohui Liao, Xiaofei Jin, Hai Zhang, Xuecang Zhu, Junhua Zhang, Yu National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Lab/Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology China Huawei Technologies Co. Ltd. China

ISBN: (纸本)9781939133458

Approximate nearest neighbor search (ANNS) has emerged as a crucial component of database and AI infrastructure. Ever-increasing vector datasets pose significant challenges in terms of performance, cost, and accuracy for ANNS services. None of modern ANNS systems can address these issues simultaneously. In this paper, we present FusionANNS, a high-throughput, low-latency, cost-efficient, and high-accuracy ANNS system for billion-scale datasets using SSDs and only one entry-level GPU. The key idea of FusionANNS lies in CPU/GPU collaborative filtering and re-ranking mechanisms, which significantly reduce I/O operations across CPUs, GPU, and SSDs to break through the I/O performance bottleneck. Specifically, we propose three novel designs: (1) multi-tiered indexing to avoid data swapping between CPUs and GPU, (2) heuristic re-ranking to eliminate unnecessary I/Os and computations while guaranteeing high accuracy, and (3) redundant-aware I/O deduplication to further improve I/O efficiency. We implement FusionANNS and compare it with the state-of-the-art SSD-based ANNS system-SPANN and GPU-accelerated in-memory ANNS system-RUMMY. Experimental results show that FusionANNS achieves 1) 9.4-13.1× higher query per second (QPS) and 5.7-8.8× higher cost efficiency compared with SPANN;2) and 2-4.9× higher QPS and 2.3-6.8× higher cost efficiency compared with RUMMY, while guaranteeing low latency and high accuracy. © 2025 FAST. All Rights Reserved.

关键词： Collaborative filtering

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An Efficient Graph Accelerator with Distributed On-Chip Memory Hierarchy 22nd

An Efficient Graph Accelerator with Distributed On-Chip Mem...

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22nd International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2022

作者： Zheng, Ran Jiang, Yingxin Wang, Yibo Su, Yongbo Zheng, Long Yao, Pengcheng Liao, Xiaofei Jin, Hai National Engineering Research Center for Big Data Technology and System/Services Computing Technology and System Lab/Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan430074 China Zhejiang Lab Hangzhou311121 China

ISBN: (纸本)9783031226762

Graph processing has evolved and expanded swiftly with artificial intelligence and big data technology. High-Bandwidth Memory (HBM), which delivers terabyte-level memory bandwidth, has opened up new development possibilities for FPGA-based graph accelerators. However, despite the tremendous expansion of underlying hardware capabilities, existing graph accelerators have not benefited too much. In this paper, we observe that the uniformed on-chip memory hierarchy is the key to the low scalability of existing graph accelerators. We present a novel graph accelerator with a distributed on-chip memory hierarchy called GraphS. The on-chip memory of GraphS is divided into numerous tiny blocks, each of which is assigned to only one Processing Element (PE). Different PEs are connected through a scalable network-on-chip (NoC). For realistic graphs with power-law properties, a degree-aware preprocessing method is designed to balance the workload among different PEs. Our results with various graph algorithms demonstrate that GraphS can outperform state-of-the-art ForeGraph by up to 21.84 ×. © 2023, Springer Nature Switzerland AG.

关键词： Network-on-chip

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P3DC:Reducing DRAM Cache Hit Latency by Hybrid Mappings

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Journal of Computer Science & technology 2024年第6期39卷 1341-1360页

作者： Ye Chi Ren-Tong Guo Xiao-Fei Liao Hai-Kun Liu Jianhui Yue National Engineering Research Center for Big Data Technology and System Wuhan 430074China Services Computing Technology and System Laboratory Wuhan 430074China Cluster and Grid Computing Laboratory Wuhan 430074China School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China School of Big Data and Internet Shenzhen Technology UniversityShenzhen 518118China Department of Computer Science Michigan Technological UniversityHoughton 49931-1295U.S.A.

Die-stacked dynamic random access memory(DRAM)caches are increasingly advocated to bridge the performance gap between the on-chip cache and the main *** fully realize their potential,it is essential to improve DRAM cache hit rate and lower its cache hit *** order to take advantage of the high hit-rate of set-association and the low hit latency of direct-mapping at the same time,we propose a partial direct-mapped die-stacked DRAM cache called *** design is motivated by a key observation,i.e.,applying a unified mapping policy to different types of blocks cannot achieve a high cache hit rate and low hit latency *** address this problem,P3DC classifies data blocks into leading blocks and following blocks,and places them at static positions and dynamic positions,respectively,in a unified set-associative *** also propose a replacement policy to balance the miss penalty and the temporal locality of different *** addition,P3DC provides a policy to mitigate cache thrashing due to block type *** results demonstrate that P3DC can reduce the cache hit latency by 20.5%while achieving a similar cache hit rate compared with typical set-associative caches.P3DC improves the instructions per cycle(IPC)by up to 66%(12%on average)compared with the state-of-the-art direct-mapped cache—BEAR,and by up to 19%(6%on average)compared with the tag-data decoupled set-associative cache—DEC-A8.

关键词： die-stacked dynamic random access memory(DRAM) cache set-associative direct-mapped hit latency

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CDA-GNN: A Chain-driven Accelerator for Efficient Asynchronous Graph Neural Network 24

CDA-GNN: A Chain-driven Accelerator for Efficient Asynchrono...

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61st ACM/IEEE Design Automation Conference, DAC 2024

作者： Yu, Hui Zhang, Yu He, Ligang He, Donghao Li, Qikun Zhao, Jin Liao, Xiaofei Jin, Hai Gu, Lin Liu, Haikun National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology China Department of Computer Science University of Warwick United Kingdom

ISBN: (纸本)9798400706011

Asynchronous Graph Neural Network (AGNN) has attracted much research attention because it enables faster convergence speed than the synchronous GNN. However, existing software/hardware solutions suffer from redundant computation overhead and excessive off-chip communications for AGNN due to irregular state propagations along the dependency chains between vertices. This paper proposes a chain-driven asynchronous accelerator, CDA-GNN, for efficient AGNN inference. Specifically, CDA-GNN proposes a chain-driven asynchronous execution approach into novel accelerator design to regularize the vertex state propagations for fewer redundant computations and off-chip communications and also designs a chain-aware data caching method to improve data locality for AGNN. We have implemented and evaluated CDA-GNN on a Xilinx Alveo U280 FPGA card. Compared with the cutting-edge software solutions (i.e., Dorylus and AMP) and hardware solutions (i.e., BlockGNN and FlowGNN), CDA-GNN improves the performance of AGNN inference by an average of 1,173x, 182.4x, 10.2x, and 7.9x and saves energy by 2,241x, 242.2x, 12.4x, and 8.9x, respectively. © 2024 Copyright is held by the owner/author(s). Publication rights licensed to ACM.

关键词： Graph neural networks

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ES-Mask: Evolutionary Strip Mask for Explaining Time Series Prediction 37

ES-Mask: Evolutionary Strip Mask for Explaining Time Series ...

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37th AAAI Conference on Artificial Intelligence, AAAI 2023

作者： Sun, Yifei Song, Cheng Lu, Feng Li, Wei Jin, Hai Zomaya, Albert Y. National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology China Centre for Distributed and High Performance Computing School of Computer Science University of Sydney Australia

ISBN: (纸本)9781577358800

Machine learning models are increasingly used in time series prediction with promising results. The model explanation of time series prediction falls behind the model development and makes less sense to users in understanding model decisions. This paper proposes ES-Mask, a post-hoc and model-agnostic evolutionary strip mask-based saliency approach for time series applications. ES-Mask designs the mask consisting of strips with the same salient value in consecutive time steps to produce binary and sustained feature importance scores over time for easy understanding and interpretation of time series. ES-Mask uses an evolutionary algorithm to search for the optimal mask by manipulating strips in rounds, thus is agnostic to models by involving no internal model states in the search. The initial experiments on MIMIC-III data set show that ES-Mask outperforms state-of-the-art methods. Copyright © 2023, Association for the Advancement of Artificial Intelligence (***). All rights reserved.

关键词： Time series

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RETIA: Relation-Entity Twin-Interact Aggregation for Temporal Knowledge Graph Extrapolation 39

RETIA: Relation-Entity Twin-Interact Aggregation for Tempora...

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39th IEEE International Conference on Data Engineering, ICDE 2023

作者： Liu, Kangzheng Zhao, Feng Xu, Guandong Wang, Xianzhi Jin, Hai Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Wuhan China University of Technology Sydney Data Science and Machine Intelligence Lab Sydney Australia

ISBN: (纸本)9798350322279

Temporal knowledge graph (TKG) extrapolation aims to predict future unknown events (facts) based on historical information, and has attracted considerable attention due to its great practical significance. Accurate representations (embeddings) of entities and relations form the basis of TKG extrapolation. Recent work has been devoted to improving the rationality of entity representations. However, on the one hand, ignoring relation modeling results in incomplete relation representations;therefore, some approaches aggregate only immediately adjacent entities of relations, but this can lead to the "message islands"problem of relation modeling. On the other hand, ignoring the association constraints between relations and entities can make the embeddings of both relations and entities prone to overfitting. To address the abovementioned challenges, we propose an advanced method, namely, RETIA. For the former issue, we generate twin hyperrelation subgraphs for each historical subgraph and then aggregate both the adjacent entities and relations in the hyperrelation subgraphs through a graph convolutional network (GCN). About the latter concern, we propose a twin-interact module (TIM), which provides communication channels for relation aggregation and entity aggregation during the evolution of the historical sequence. Experiments conducted on five public datasets show that RETIA has made great improvements across several evaluation metrics. Our released code is available at https://***/CGCL-codes/RETIA. © 2023 IEEE.

关键词： Extrapolation

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Layered Structure Aware Dependent Microservice Placement Toward Cost Efficient Edge Clouds 42

Layered Structure Aware Dependent Microservice Placement Tow...

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42nd IEEE International Conference on Computer Communications, INFOCOM 2023

作者： Zeng, Deze Geng, Hongmin Gu, Lin Li, Zhexiong China University of Geosciences School of Computer Science Wuhan China Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Wuhan China

ISBN: (纸本)9798350334142

Although the containers are featured by light-weightness, it is still resource-consuming to pull and startup a large container image, especially in relatively resource-constrained edge cloud. Fortunately, Docker, as the most widely used container, provides a unique layered architecture that allows the same layer to be shared between microservices so as to lower the deployment cost. Meanwhile, it is highly desirable to deploy dependent microservices of an application together to lower the operation cost. Therefore, the balancing of microservice deployment cost and the operation cost should be considered comprehensively to achieve minimal overall cost of an on-demand application. In this paper, we first formulate this problem into a Quadratic Integer Programming form (QIP) and prove it as a NP-hard problem. We further propose a Randomized Rounding-based Microservice Deployment and Layer Pulling (RR-MDLP) algorithm with low computation complexity and guaranteed approximation ratio. Through extensive experiments, we verify the high efficiency of our algorithm by the fact that it significantly outperforms existing state-of-the-art microservice deployment strategies. © 2023 IEEE.

关键词： Containers

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