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International Conference on Advanced Robotics (ICAR)

作者： S.P. Ananthanarayanan A.A. Goldberg J. Mylopoulos Robotics and Automation Laboratory Department of Mechanical Engineering University of Toronto Toronto ONT Canada Dept. of Mech. Eng. Toronto Univ. Ont. Canada Department of Computer Science University of Toronto Toronto ONT Canada

In this work, a 'qualitative reasoning' (common-sense reasoning) approach to the synthesis of dexterous manipulative synergies for articulated robot hands is provided. An intelligent planner has been developed in order to perform this synthesis. The synthesis is performed in the following step-wise manner viz., (i) determination of a desired displacement of an object, given an initial and final configuration and (ii) determination of the corresponding displacements of the fingers, that induces the desired object displacements. The determination of a desired object displacement, is the main subject of this paper. A 'qualitative' formulation of object motion, and an algorithm to determine the sequence of motions necessary to change an arbitrary initial configuration of the object, to a desired final configuration, are provided. The details regarding the implementation of this algorithm and the future implications of this work are highlighted.< >

关键词： Grasping Humans Robotics and automation Laboratories Mechanical engineering computer science Intelligent robots Fingers Humanoid robots Fuzzy logic

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AN ANNEALING-BASED CIRCUIT PARTITIONER FOR HYPERCUBE ARCHITECTURE: DESIGN AND PERFORMANCE EVALUATION

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International Journal of High Speed Computing 1990年第1期2卷 69-84页

作者： SRILATA RAMAN L.M. PATNAIK Dept. of Electrical and Computer Engineering and Coordinated Science Laboratory University of Illinois at Urbana-Champaign IL 61801 U.S.A Microprocessor Applications Laboratory Dept. of Computer Science and Automation and Supercomputer Education and Research Center Indian Institute of Science Bangalore 560 012 India

This paper discusses the parallel implementation of a hypercube-based circuit partitioning scheme. The circuit partitioner is based on a simulated annealing algorithm and is designed to provide near optimal circuit partitions for simulating the circuits on a hypercube architecture. The circuit partitioning scheme optimizes multiple criteria such as tight coupling of nodes within a subcircuit, load balancing among processors and communication overheads. Design of a partitioner that obtains near optimal solutions satisfying such multiple criteria is difficult using any simple heuristic techniques other than simulated annealing.

关键词： Circuit simulation circuit partitioning simulated annealing hypercube architecture

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PARALLEL IMPLEMENTATION OF CIRCUIT SIMULATION

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International Journal of High Speed Computing 1990年第4期2卷 351-373页

作者： SRILATA RAMAN L.M. PATNAIK R. MALL Dept. of Electrical and Computer Engineering and Coordinated Science Laboratory University of Illinois at Urbana-Champaign IL 61801 U.S.A Microprocessor Applications Laboratory Indian Institute of Science Bangalore 560 012 India Supercomputer Education and Research Centre Indian Institute of Science Bangalore 560 012 India Dept. of Computer Science and Automation Indian Institute of Science Bangalore 560 012 India

The importance of circuit simulation in the design of VLSI circuits has channelised research work in the direction of finding methods to speedup this highly compute-intensive problem. On one hand, attempts have been made to find better algorithms and use faster hardware; and on the other hand, to use parallel architectures for accelerating the circuit simulation task. In this paper, we examine the various issues involved in parallelizing two well-known circuit simulation approaches – direct methods and relaxation methods. A number of parallel computer architectures which have been used for this purpose are also surveyed.

关键词： Circuit simulation VLSI circuit design direct method relaxation method parallel processing

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Intelligent and Adaptive Control of FMS Contributing to CIM Trend

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IFAC Proceedings Volumes 1990年第8期23卷 31-36页

作者： E. Szelke I. Mészáros Computer and Automation Institute Hungarian Academy of Sciences P.O. Box 63 H-J502 Budapest 112 Hungary Technical University of Budapest Dept. of Manufact. Engineering H-1521 Budapest XI. Egry J. u. 1. E-ip. Hungary

This paper addresses some basic concepts involved in a knowledge-based adaptive control system and dynamic adaptive scheduling methodology for FMSs, Recent advances in flexible automation resulted in a complex multiprocessing environment. To cope with dynamically changing external demands, internal production goals and unanticipated events arising at the factory floor, the proposed intelligent control system is provided with features contributing to the CIM trend, system adaptivity and a new modelreformulating approach to scheduling, in a real-time decision making environment.

关键词： Flexible manufacturing production control adaptive control discrete time systems dynamic response hierarchically intelligent control knowledge-based scheduling knowledge-based scheduling technological planning

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HIRECS: HYPERCUBE IMPLEMENTATION OF RELAXATION-BASED CIRCUIT SIMULATION

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International Journal of High Speed Computing 1989年第3期1卷 399-432页

作者： SRILATA RAMAN L.M. PATNAIK Dept. of Electrical and Computer Engineering and Coordinated Science Laboratory University of Illinois at Urbana-Champaign IL 61801 U.SA Dept. of Computer Science and Automation and Microprocessor Applications Laboratory Indian Institute of Science Bangalore 560 012 INDIA

Circuit simulation is a highly compute-intensive task as it involves solving thousands of ordinary differential equations (ODEs) describing the VLSI circuit under consideration. This paper describes an effort towards speeding up this task using a hypercube-based architecture. The paper focusses on the design and development of HIRECS (Hypercube Implementation of RElaxation-Based Circuit Simulation). HIRECS is based on the relaxation approach of solving the ODEs describing the circuit. The natural decomposition of the problem makes the relaxation algorithms amenable to parallel implementation. HIRECS employs the Waveform Relaxation (WR) algorithm. The special feature of WR algorithm is that the latency of the circuit can be exploited better, effecting a saving in the total computation time. The concept of ’windowing’ has been incorporated in HIRECS to effect a saving in the memory requirement. Another important feature of HIRECS is a novel synchronization scheme called partial synchronization. HIRECS runs on a DEC-1090 system and is developed using SIMULA. Performance studies of HIRECS based on parameters such as speedup, efficiency, and utilization of processors have been carried out. The performance evaluation of HIRECS in the simulation of some bench mark circuits like inverter chains and multiplexers indicates that a significant speedup, almost linear, can be obtained using a hypercube. For circuits with large number of nodes, such an implementation can result in tremendous saving in the computation time.

关键词： Circuit simulation Hypercube architecture Parallel processing Waveform relaxation

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Knowledge based system to diagnose faults in discrete event systems 89

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2nd International Conference on Industrial and engineering Applications of Artificial Intelligence and Expert Systems, IEA/AIE 1989

作者： Sitaram, Muralidhar Ernst, George Marcuse, John Quintus Computer Systems Inc. 1310 Villa Street Mountain ViewCA94041 United States Dept. of Computer Engineering and Science Center of Automation and Intelligent Systems Research Case Western Reserve University ClevelandOH44106 United States Reliance Electric Company ClevelandOH44117 United States

ISBN: (纸本)0897913205

This paper describes a Fault Explanation System (FES) that AIDS in the diagnosis of failures in discrete event systems such as certain manufacturing processes. These systems are characterized by the use of programmable logic controllers (PLC) to control the systems. In addition PLC's also perform event logging. The event log (fault log) records exceptions which may be alarms, warnings or status reports. A major difficulty is that most of the alarms do not indicate real faults in the system;for example, a fault may cause an exception which indicates what the fault is, but this exception may also give rise to a number of other exceptions which are just side-effects. FES interprets and explains faults in the log based on a model provided by the ladder logic diagrams of the PLC. These explanations separate real exceptions from the kind of side-effects described above. Finally FES ranks explanations according to their plausibility. © 1989 ACM.

关键词： Discrete event simulation

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An expert supervisor for a robotic work cell

An expert supervisor for a robotic work cell

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Intelligent Robots and computer Vision VI 1987

作者： Moed, M.C. Kelley, R.B. Robotics and Automation Laboratories Electrical Computer and Systems Engineering Dept. Rensselaer Polytechnic Institute TroyNY12180-3590 United States

To increase task flexibility in a robotic assembly environment, a hierarchical planning and execution system is being developed which will map user-specified 3D part assembly tasks into various target robotic work cells, and execute these tasks efficiently using manipulators and sensors available in the work cell. One level of this hierarchy, the Supervisor, is responsible for assigning subtasks of a system-generated Task Plan to a set of task specific Specialists and on-line coordination of the activity of these Specialists to accomplish the user-specified assembly. The design of the Supervisor can be broken down into five major functional blocks: resource management;concurrency detection;task scheduling;error recovery;and interprocess communication. The Supervisor implementation has been completed on a VAX 11/750 under a Unix environment. PC card Pick-Insert experiments were performed to test this implementation. To test the robustness of the architecture, the Supervisor was then transported to a new work cell under a VMS environment. The experiments performed under Supervisor control in both implementations are discussed after a brief explanation of the functional blocks of the Supervisor and the other levels in the hierarchy. © 1988 SPIE. All rights reserved.

关键词： Supervisory personnel

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Heterogeneous neural networks for adaptive behavior in dynamic environments 88

Heterogeneous neural networks for adaptive behavior in dynam...

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Proceedings of the 2nd International Conference on Neural Information Processing Systems

作者： Hillel J. Chiel Randall D. Beer Leon S. Sterling Biology Dept. & CAISR CWRU Dept. of Computer Engineering and Science and Center for Automation and Intelligent Systems Research Case Western Reserve University Cleveland OH CS Dept. & CAISR CWRU

Research in artificial neural networks has generally emphasized homogeneous architectures. In contrast, the nervous systems of natural animals exhibit great heterogeneity in both their elements and patterns of interconnection. This heterogeneity is crucial to the flexible generation of behavior which is essential for survival in a complex, dynamic environment. It may also provide powerful insights into the design of artificial neural networks. In this paper, we describe a heterogeneous neural network for controlling the walking of a simulated insect. This controller is inspired by the neuroethological and neurobiological literature on insect locomotion. It exhibits a variety of statically stable gaits at different speeds simply by varying the tonic activity of a single cell. It can also adapt to perturbations as a natural consequence of its design.

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A Comparison of Fault Detection Methods and Adaptive Identification Algorithms ■

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IFAC Proceedings Volumes 1988年第9期21卷 535-542页

作者： G. Favier C. Rougerie J.P. Bariani W. do Amaral L. Gimeno L.V.R. de Arruda CNRS/LASSY 41 Bd Napoléon III 06041 Nice Cedex France and Grew “Systèmes Adaptatifs” Faculty of Electrical Engineering Dept. of Computer Eng. and Industrial Automation CP 6101 Unicamp 13081 Campinas Brasil

This paper is concerned with the problem of identification of timevarying linear stochastic systems. Slowly time-varying systems are first considered. Recursive identification algorithms are described in U-D factorized forms. In presence of abrupt parameter changes, the tracking ability of identification algorithms is improved by use of a fault detection method resulting in adaptive identification algorithms. A comparison of performance of various adaptive identification algorithms is carried out through a study in simulation and experimental results are given to show the influence of the tuning parameters of such algorithms

关键词： Adaptive identification Time-varying parameter estimation Weighted Least-Squares Kalman filter Fault detection

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Logic verification system for very large computers using LSI's 16

Logic verification system for very large computers using LSI...

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16th Design automation Conference, DAC 1979

作者： Ohno, Yasuhiro Miyoshi, Masayuki Sato, Katsuya Computer Design Automation Engineering Dept. Hitachi Ltd. 1 Horiyamashita Hadano Kanagawa259-13 Japan

To aid design verification of very large computers using many LSI's, software tools including a logic simulator with capability of 750,000 gates have been developed. © 1979 Institute of Electrical and Electro... 详细信息

关键词： computer software

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