Dependable DPU Architectures on AMD-Xilinx Versal Adaptive SoCs for Space Applications

作     者：Perryman, Noah Sabogal, Sebastian Wilson, Christopher George, Alan 

作者机构：University of Pittsburgh Electrical and Computer Engineering Department PittsburghPA15213 United States NASA Goddard Space Flight Center Science Data Processing Branch GreenbeltMD20771 United States 

出 版 物：《IEEE Transactions on Aerospace and Electronic Systems》 (IEEE Trans. Aerosp. Electron. Syst.)

年 卷 期：2025年第61卷第3期

页      面：6629-6646页

核心收录：

学科分类：0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 081203[工学-计算机应用技术] 0817[工学-化学工程与技术] 08[工学] 0706[理学-大气科学] 0827[工学-核科学与技术] 0835[工学-软件工程] 0703[理学-化学] 0803[工学-光学工程] 0812[工学-计算机科学与技术（可授工学、理学学位）] 0702[理学-物理学] 

基　　金：This work was supported in part by the industry and government members of the NSF Center for Space  High-Performance  and resilient Computing (SHREC)  and in part National Science Foundation I/UCRC Program under Grant CNS1738783. The authors would like to thank the Code 587 Science Data Processing Branch of NASA Goddard Space Flight Center (GSFC) as well as the NSF SHREC Center at the University of Pittsburgh for their continued support and guidance on this research. The authors would also like to thank the NASA GSFC Internal Research and Development (IRAD) program specifically the Cross-Cutting Technology Capabilities (CCTC) Line of Business (LOB) and SmallSat LOB. Finally  the authors would also like to thank the support of AMD-Xilinx collaborators including T. Vales  D. Sandler  and K. O\u2019Neill 

主　　题：Artificial intelligence Program processors Computer architecture Radiation hardening (electronics) Reliability Energy efficiency Computational modeling Field programmable gate arrays Performance evaluation Computers 

摘      要：Space-computing platforms have considerable performance restrictions that are imposed by the limited onboard-processing capabilities provided by heritage flight computers. Conversely, there is a growing need for increased system autonomy enabled by deep learning (DL) to maximize performance and minimize the burden of ground-based processing. To address these limitations, domain-specific architectures with specialized acceleration hardware, such as the AMD-Xilinx Versal adaptive System-on-Chip (SoC), have been developed. This heterogeneous platform contains significant energy-efficient compute capabilities, but it is susceptible to radiation-induced effects. Therefore, the dependability of the device must be characterized prior to inclusion on future space-computing platforms. In addition, several popular DL models exist, but each model provides unique accuracy, performance, energy-efficiency, and dependability characteristics that must be thoroughly understood. In this research, we propose a methodology for evaluating and analyzing dependable computing on AMD-Xilinx deep learning processing unit (DPU) architectures on Versal SoCs using simulated radiation-induced single-event effects through memory-mapped data fault injection. Using our proposed methodology, we perform this fault injection on three Versal AI Core and two Versal AI Edge DPU architectures and evaluate system performance, power consumption, energy efficiency, resource utilization, and dependability on three deployed DL models. Due to innate DPU configurability, our analysis also explores adding varying degrees of triple modular redundancy (TMR) through different DPU architectural features for increased dependability. We leveraged our fault-injection methodology to demonstrate a 24.65× average reduction in critical bits of our TMR DPU architectures compared to the unmitigated baseline, showcasing a significant increase in system dependability. © 1965-2011 IEEE.